!48 Update setup.py

From: @zhang-liang-pengkun 
Reviewed-by: @Charlie_li 
Signed-off-by: @Charlie_li

0001-Add-support-for-RISC-V.patch

@@ -0,0 +1,63 @@
+From b3e28228b0f5af506f38d1a211ed0794dd66fafe Mon Sep 17 00:00:00 2001
+From: Andreas Schwab <schwab@suse.de>
+Date: Thu, 19 Jul 2018 18:38:31 +0200
+Subject: [PATCH] Add support for RISC-V
+
+---
+ platform/switch_riscv_unix.h | 32 ++++++++++++++++++++++++++++++++
+ slp_platformselect.h         |  2 ++
+ 2 files changed, 34 insertions(+)
+ create mode 100644 platform/switch_riscv_unix.h
+
+diff --git a/platform/switch_riscv_unix.h b/platform/switch_riscv_unix.h
+new file mode 100644
+index 0000000..5b5ea98
+--- /dev/null
++++ b/platform/switch_riscv_unix.h
+@@ -0,0 +1,32 @@
++#define STACK_REFPLUS 1
++
++#ifdef SLP_EVAL
++#define STACK_MAGIC 0
++
++#define REGS_TO_SAVE "s0", "s1", "s2", "s3", "s4", "s5", \
++		     "s6", "s7", "s8", "s9", "s10", "s11", "fs0", "fs1", \
++		     "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", "fs8", "fs9", \
++		     "fs10", "fs11"
++
++static int
++slp_switch(void)
++{
++  register int ret;
++  register long *stackref, stsizediff;
++  __asm__ volatile ("" : : : REGS_TO_SAVE);
++  __asm__ volatile ("mv %0, sp" : "=r" (stackref) : );
++  {
++      SLP_SAVE_STATE(stackref, stsizediff);
++      __asm__ volatile (
++	  "add sp, sp, %0\n\t"
++	  : /* no outputs */
++	  : "r" (stsizediff)
++	  );
++      SLP_RESTORE_STATE();
++  }
++  __asm__ volatile ("" : : : REGS_TO_SAVE);
++  __asm__ volatile ("mv %0, zero" : "=r" (ret) : );
++  return ret;
++}
++
++#endif
+diff --git a/slp_platformselect.h b/slp_platformselect.h
+index e6cdc9f..b52c287 100644
+--- a/slp_platformselect.h
++++ b/slp_platformselect.h
+@@ -49,4 +49,6 @@
+ #include "platform/switch_m68k_gcc.h" /* gcc on m68k */
+ #elif defined(__GNUC__) && defined(__csky__)
+ #include "platform/switch_csky_gcc.h" /* gcc on csky */
++#elif defined(__GNUC__) && defined(__riscv)
++#include "platform/switch_riscv_unix.h" /* gcc on RISC-V */
+ #endif
+-- 
+2.39.0.windows.2
+

0002-Workaround-a-gcc-bug-using-manual-save-restore-of-r3.patch

@@ -0,0 +1,54 @@
+From 86f72decefa955affbedf440a7f06ef5a5e04bc2 Mon Sep 17 00:00:00 2001
+From: Alexey Borzenkov <snaury@gmail.com>
+Date: Tue, 4 Sep 2018 23:30:27 +0300
+Subject: [PATCH] Workaround a gcc bug using manual save/restore of r30 (fixes
+ #136)
+
+---
+ platform/switch_ppc64_linux.h | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/platform/switch_ppc64_linux.h b/platform/switch_ppc64_linux.h
+index 53d127b..88e6847 100644
+--- a/platform/switch_ppc64_linux.h
++++ b/platform/switch_ppc64_linux.h
+@@ -2,6 +2,8 @@
+  * this is the internal transfer function.
+  *
+  * HISTORY
++ * 04-Sep-18  Alexey Borzenkov  <snaury@gmail.com>
++ *      Workaround a gcc bug using manual save/restore of r30
+  * 21-Mar-18  Tulio Magno Quites Machado Filho  <tuliom@linux.vnet.ibm.com>
+  *      Added r30 to the list of saved registers in order to fully comply with
+  *      both ppc64 ELFv1 ABI and the ppc64le ELFv2 ABI, that classify this
+@@ -64,7 +66,7 @@
+ 
+ #define REGS_TO_SAVE "r14", "r15", "r16", "r17", "r18", "r19", "r20",  \
+        "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29",  \
+-       "r30","r31",                                                    \
++       "r31",                                                    \
+        "fr14", "fr15", "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", \
+        "fr22", "fr23", "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", \
+        "fr30", "fr31", \
+@@ -77,8 +79,10 @@ slp_switch(void)
+     register int err;
+     register long *stackref, stsizediff;
+     void * toc;
++    void * r30;
+     __asm__ volatile ("" : : : REGS_TO_SAVE);
+     __asm__ volatile ("std 2, %0" : "=m" (toc));
++    __asm__ volatile ("std 30, %0" : "=m" (r30));
+     __asm__ ("mr %0, 1" : "=r" (stackref) : );
+     {
+         SLP_SAVE_STATE(stackref, stsizediff);
+@@ -91,6 +95,7 @@ slp_switch(void)
+             );
+         SLP_RESTORE_STATE();
+     }
++    __asm__ volatile ("ld 30, %0" : : "m" (r30));
+     __asm__ volatile ("ld 2, %0" : : "m" (toc));
+     __asm__ volatile ("" : : : REGS_TO_SAVE);
+     __asm__ volatile ("li %0, 0" : "=r" (err));
+-- 
+2.39.0.windows.2
+

0003-Update-switch_ppc_aix.h.patch

@@ -0,0 +1,35 @@
+From 8911c385326d539f299cd6f2c3e395cd5417f996 Mon Sep 17 00:00:00 2001
+From: k2uhl <github@redlagoon.net>
+Date: Tue, 21 May 2019 21:39:19 -0500
+Subject: [PATCH] Update switch_ppc_aix.h
+
+Based off abarnert's feedback on stackexchange, force use of a register instead of suggesting.  From:
+https://stackoverflow.com/questions/11587635/cross-compile-of-pythons-greenlet-and-gevent-on-linux-x86-64-for-powerpc
+---
+ platform/switch_ppc_aix.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/platform/switch_ppc_aix.h b/platform/switch_ppc_aix.h
+index 45a277a..c7d476f 100644
+--- a/platform/switch_ppc_aix.h
++++ b/platform/switch_ppc_aix.h
+@@ -56,14 +56,14 @@ slp_switch(void)
+     register int err;
+     register int *stackref, stsizediff;
+     __asm__ volatile ("" : : : REGS_TO_SAVE);
+-    __asm__ ("mr %0, 1" : "=g" (stackref) : );
++    __asm__ ("mr %0, 1" : "=r" (stackref) : );
+     {
+         SLP_SAVE_STATE(stackref, stsizediff);
+         __asm__ volatile (
+             "mr 11, %0\n"
+             "add 1, 1, 11\n"
+             : /* no outputs */
+-            : "g" (stsizediff)
++            : "r" (stsizediff)
+             : "11"
+             );
+         SLP_RESTORE_STATE();
+-- 
+2.39.0.windows.2
+

0004-Update-setup.py.patch

@@ -0,0 +1,25 @@
+From d9f9b3006e81807847c370e6794f524d594c6957 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Bengt=20L=C3=BCers?= <Bengt.Lueers@gmail.com>
+Date: Tue, 4 Feb 2020 22:19:57 +0100
+Subject: [PATCH] Update setup.py
+
+Document Python 3.8 compatibility achieved with #152 to be enable #151.
+---
+ setup.py | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/setup.py b/setup.py
+index a0b66f6..f2b39e0 100755
+--- a/setup.py
++++ b/setup.py
+@@ -101,6 +101,7 @@ setup(
+         'Programming Language :: Python :: 3.5',
+         'Programming Language :: Python :: 3.6',
+         'Programming Language :: Python :: 3.7',
++        'Programming Language :: Python :: 3.8',
+         'Operating System :: OS Independent',
+         'Topic :: Software Development :: Libraries :: Python Modules'],
+     **setuptools_args)
+-- 
+2.39.0.windows.2
+

python-greenlet.spec

@@ -1,10 +1,14 @@
 Name:            python-greenlet
 Version:         0.4.14
-Release:         3
+Release:         8
 Summary:         lightweight coroutines for in-process concurrent programming
 License:         MIT
 URL:             https://github.com/python-greenlet/greenlet
-Source0:         https://github.com/python-greenlet/greenlet/archive/greenlet-0.4.14.tar.gz
+Source0:         https://github.com/python-greenlet/greenlet/archive/0.4.14.tar.gz
+Patch0001:       0001-Add-support-for-RISC-V.patch
+Patch0002:       0002-Workaround-a-gcc-bug-using-manual-save-restore-of-r3.patch
+Patch0003:       0003-Update-switch_ppc_aix.h.patch
+Patch0004:       0004-Update-setup.py.patch
 
 BuildRequires:   python2-devel python2-setuptools python3-devel python3-setuptools
 BuildRequires:   gcc-c++
@@ -83,6 +87,21 @@ that use python3-greenlet.
 %{_includedir}/python%{python3_version}*/greenlet/
 
 %changelog
+* Thu Dec 28 2023 zhangliangpengkun<zhangliangpengkun@xfusion.com> - 0.4.14-8
+- Update setup.py
+
+* Thu Oct 23 2023 zhangliangpengkun<zhangliangpengkun@xfusion.com> - 0.4.14-7
+- Update switch_ppc_aix.h
+
+* Thu Nov 02 2023 zhangliangpengkun<zhangliangpengkun@xfusion.com> - 0.4.14-6
+- Workaround a gcc bug using manual save/restore of r30
+
+* Tue Oct 24 2023 zhangliangpengkun<zhangliangpengkun@xfusion.com> - 0.4.14-5
+- Add support for RISC-V
+
+* Thu Sep 17 2020 liuweibo <liuweibo10@huawei.com> - 0.4.14-4
+- Fix Source0
+
 * Fri Aug 21 2020 fanjiachen <fanjiachen3@huawei.com> - 0.4.14-3
 - Type:rebuild
 - ID:NA