e4214041dc
- accel/tcg: fix race in cpu_exec_step_atomic (bug 1863025) - pci: assert configuration access is within bounds - io: remove io watch if TLS channel is closed during handshake Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
50 lines
1.7 KiB
Diff
50 lines
1.7 KiB
Diff
From b451371b43e44f852f8a487ce7adf8e57cee2c6c Mon Sep 17 00:00:00 2001
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From: Prasad J Pandit <pjp@fedoraproject.org>
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Date: Thu, 4 Jun 2020 17:05:25 +0530
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Subject: [PATCH] pci: assert configuration access is within bounds
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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While accessing PCI configuration bytes, assert that
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'address + len' is within PCI configuration space.
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Generally it is within bounds. This is more of a defensive
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assert, in case a buggy device was to send 'address' which
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may go out of bounds.
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Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
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Message-Id: <20200604113525.58898-1-ppandit@redhat.com>
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Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
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Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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---
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hw/pci/pci.c | 4 ++++
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1 file changed, 4 insertions(+)
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diff --git a/hw/pci/pci.c b/hw/pci/pci.c
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index 602fc566cc..9f6632ae7d 100644
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--- a/hw/pci/pci.c
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+++ b/hw/pci/pci.c
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@@ -1379,6 +1379,8 @@ uint32_t pci_default_read_config(PCIDevice *d,
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{
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uint32_t val = 0;
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+ assert(address + len <= pci_config_size(d));
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+
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if (pci_is_express_downstream_port(d) &&
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ranges_overlap(address, len, d->exp.exp_cap + PCI_EXP_LNKSTA, 2)) {
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pcie_sync_bridge_lnk(d);
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@@ -1392,6 +1394,8 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int
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int i, was_irq_disabled = pci_irq_disabled(d);
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uint32_t val = val_in;
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+ assert(addr + l <= pci_config_size(d));
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+
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for (i = 0; i < l; val >>= 8, ++i) {
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uint8_t wmask = d->wmask[addr + i];
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uint8_t w1cmask = d->w1cmask[addr + i];
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--
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2.41.0.windows.1
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