!264 build smt processor structure to support smt topology

From: @imxcc
Reviewed-by: @xydong
Signed-off-by: @xydong
This commit is contained in:
openeuler-ci-bot 2021-04-25 19:55:10 +08:00 committed by Gitee
commit eeff6ad938
3 changed files with 143 additions and 1 deletions

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@ -0,0 +1,32 @@
From 905c910373b5e6362181f227a1564eb3bef5a353 Mon Sep 17 00:00:00 2001
From: kevinZhu <zhukeqian94@163.com>
Date: Thu, 29 Oct 2020 19:24:48 +0800
Subject: [PATCH] Bugfix: hw/acpi: Use max_cpus instead of cpus when build PPTT
table The field "cpus" is the initial number of CPU for guest, and the field
"max_cpus" is the max number of CPU after CPU hotplug. When building PPTT for
guest, we should take all CPUs into account, otherwise the "smp_sockets" is
wrong.
Fixes: 7cfcd8c8a2fe ("build smt processor structure to support smt topology")
Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com>
---
hw/acpi/aml-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 8a3b51c835..f01669df57 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -167,7 +167,7 @@ void build_pptt(GArray *table_data, BIOSLinker *linker, int possible_cpus)
struct offset_status offset;
const MachineState *ms = MACHINE(qdev_get_machine());
unsigned int smp_cores = ms->smp.cores;
- unsigned int smp_sockets = ms->smp.cpus / (smp_cores * ms->smp.threads);
+ unsigned int smp_sockets = ms->smp.max_cpus / (smp_cores * ms->smp.threads);
acpi_data_push(table_data, sizeof(AcpiTableHeader));
--
2.27.0

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@ -0,0 +1,104 @@
From 7cfcd8c8a2fe3bd59714c6d5c6d55eb86bf7bc99 Mon Sep 17 00:00:00 2001
From: Henglong Fan <fanhenglong@huawei.com>
Date: Tue, 18 Aug 2020 21:42:33 +0800
Subject: [PATCH] build smt processor structure to support smt topology
if vcpu support smt, create new smt hierarchy according to
Processor Properties Topology Table(PPTT) in acpi spec 6.3.
Threads sharing a core must be grouped under a unique Processor
hierarchy node structure for each group of threads
Signed-off-by: Henglong Fan <fanhenglong@huawei.com>
---
hw/acpi/aml-build.c | 40 ++++++++++++++++++++++++++++++++--------
1 file changed, 32 insertions(+), 8 deletions(-)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 74e950057b..8a3b51c835 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -53,7 +53,7 @@ static void build_append_array(GArray *array, GArray *val)
}
/*
- * ACPI 6.2 Processor Properties Topology Table (PPTT)
+ * ACPI 6.3 Processor Properties Topology Table (PPTT)
*/
#ifdef __aarch64__
static void build_cache_head(GArray *tbl, uint32_t next_level)
@@ -126,7 +126,7 @@ static void build_arm_socket_hierarchy(GArray *tbl,
build_append_int_noprefix(tbl, offset, 4);
}
-static void build_arm_cpu_hierarchy(GArray *tbl,
+static void build_arm_core_hierarchy(GArray *tbl,
struct offset_status *offset, uint32_t id)
{
if (!offset) {
@@ -144,18 +144,35 @@ static void build_arm_cpu_hierarchy(GArray *tbl,
build_append_int_noprefix(tbl, offset->l2_offset, 4);
}
+static void build_arm_smt_hierarchy(GArray *tbl,
+ uint32_t offset, uint32_t id)
+{
+ if (!offset) {
+ return;
+ }
+ build_append_byte(tbl, 0); /* Type 0 - processor */
+ build_append_byte(tbl, 20); /* Length, add private resources */
+ build_append_int_noprefix(tbl, 0, 2); /* Reserved */
+ build_append_int_noprefix(tbl, 14, 4); /* Valid id*/
+ build_append_int_noprefix(tbl, offset, 4);
+ build_append_int_noprefix(tbl, id, 4);
+ build_append_int_noprefix(tbl, 0, 4); /* Num private resources */
+}
+
void build_pptt(GArray *table_data, BIOSLinker *linker, int possible_cpus)
{
int pptt_start = table_data->len;
- int uid = 0, cpus = 0, socket;
+ int uid = 0, socket;
+ uint32_t core_offset;
struct offset_status offset;
const MachineState *ms = MACHINE(qdev_get_machine());
unsigned int smp_cores = ms->smp.cores;
+ unsigned int smp_sockets = ms->smp.cpus / (smp_cores * ms->smp.threads);
acpi_data_push(table_data, sizeof(AcpiTableHeader));
- for (socket = 0; cpus < possible_cpus; socket++) {
- int core;
+ for (socket = 0; socket < smp_sockets; socket++) {
+ int core,thread;
uint32_t l3_offset = table_data->len - pptt_start;
build_cache_hierarchy(table_data, 0, ARM_L3_CACHE);
@@ -169,14 +186,21 @@ void build_pptt(GArray *table_data, BIOSLinker *linker, int possible_cpus)
build_cache_hierarchy(table_data, offset.l2_offset, ARM_L1D_CACHE);
offset.l1i_offset = table_data->len - pptt_start;
build_cache_hierarchy(table_data, offset.l2_offset, ARM_L1I_CACHE);
- build_arm_cpu_hierarchy(table_data, &offset, uid++);
- cpus++;
+ core_offset = table_data->len - pptt_start;
+ if (ms->smp.threads <= 1) {
+ build_arm_core_hierarchy(table_data, &offset, uid++);
+ } else {
+ build_arm_core_hierarchy(table_data, &offset, core);
+ for (thread = 0; thread < ms->smp.threads; thread++) {
+ build_arm_smt_hierarchy(table_data, core_offset, uid++);
+ }
+ }
}
}
build_header(linker, table_data,
(void *)(table_data->data + pptt_start), "PPTT",
- table_data->len - pptt_start, 1, NULL, NULL);
+ table_data->len - pptt_start, 2, NULL, NULL);
}
#else
--
2.27.0

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@ -1,6 +1,6 @@
Name: qemu
Version: 4.1.0
Release: 39
Release: 40
Epoch: 2
Summary: QEMU is a generic and open source machine emulator and virtualizer
License: GPLv2 and BSD and MIT and CC-BY-SA-4.0
@ -252,6 +252,8 @@ Patch0239: virtio-blk-On-restart-process-queued-requests-in-the.patch
Patch0240: virtio_blk-Add-support-for-retry-on-errors.patch
Patch0241: block-backend-Stop-retrying-when-draining.patch
Patch0242: block-Add-sanity-check-when-setting-retry-parameters.patch
Patch0243: build-smt-processor-structure-to-support-smt-topolog.patch
Patch0244: Bugfix-hw-acpi-Use-max_cpus-instead-of-cpus-when-bui.patch
BuildRequires: flex
BuildRequires: bison
@ -635,6 +637,10 @@ getent passwd qemu >/dev/null || \
%endif
%changelog
* Sun Apr 25 2021 imxcc <xingchaochao@huawei.com>
- hw/acpi: build smt processor structure to support smt topology
- hw/acpi: Use max_cpus instead of cpus when build PPTT
* Sun Apr 25 2021 Chen Qun <kuhn.chenqun@huawei.com>
- scsi-bus: Refactor the code that retries requests
- scsi-disk: Add support for retry on errors