273 lines
8.8 KiB
Diff
273 lines
8.8 KiB
Diff
From d2ce4553eb212e9b361ad185abdfb64e18c75c5c Mon Sep 17 00:00:00 2001
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From: Huazhong Tan <tanhuazhong@huawei.com>
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Date: Sat, 17 Jun 2023 12:14:34 +0800
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Subject: [PATCH 039/283] net: hns3: add a structure for IR shaper's parameter
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in hclge_shaper_para_calc()
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mainline inclusion
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from mainline-v5.10-rc1
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commit ff7e4d0df83b8029ee42d3dea5d1939b1ff5446f
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category: feature
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bugzilla: https://gitee.com/src-openeuler/kernel/issues/I8EMQV
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Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ff7e4d0df83b8029ee42d3dea5d1939b1ff5446f
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--------------------------------
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As function hclge_shaper_para_calc() has too many arguments to add
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more, so encapsulate its three arguments ir_b, ir_u, ir_s into a
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structure.
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Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: Xiaodong Li <lixiaodong67@huawei.com>
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---
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.../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 71 ++++++++++---------
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.../ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 6 ++
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2 files changed, 45 insertions(+), 32 deletions(-)
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diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
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index f5b59c1c9435..b3564e38eba0 100644
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--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
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+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
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@@ -28,9 +28,8 @@ enum hclge_shaper_level {
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/* hclge_shaper_para_calc: calculate ir parameter for the shaper
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* @ir: Rate to be config, its unit is Mbps
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* @shaper_level: the shaper level. eg: port, pg, priority, queueset
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- * @ir_b: IR_B parameter of IR shaper
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- * @ir_u: IR_U parameter of IR shaper
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- * @ir_s: IR_S parameter of IR shaper
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+ * @ir_para: parameters of IR shaper
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+ * @max_tm_rate: max tm rate is available to config
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*
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* the formula:
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*
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@@ -41,7 +40,7 @@ enum hclge_shaper_level {
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* @return: 0: calculate sucessful, negative: fail
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*/
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static int hclge_shaper_para_calc(u32 ir, u8 shaper_level,
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- u8 *ir_b, u8 *ir_u, u8 *ir_s)
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+ struct hclge_shaper_ir_para *ir_para)
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{
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#define DIVISOR_CLK (1000 * 8)
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#define DIVISOR_IR_B_126 (126 * DIVISOR_CLK)
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@@ -74,10 +73,10 @@ static int hclge_shaper_para_calc(u32 ir, u8 shaper_level,
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ir_calc = (DIVISOR_IR_B_126 + (tick >> 1) - 1) / tick;
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if (ir_calc == ir) {
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- *ir_b = 126;
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- *ir_u = 0;
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- *ir_s = 0;
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-
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+ ir_para->ir_b = 126;
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+ ir_para->ir_u = 0;
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+ ir_para->ir_s = 0;
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+
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return 0;
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} else if (ir_calc > ir) {
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/* Increasing the denominator to select ir_s value */
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@@ -85,9 +84,9 @@ static int hclge_shaper_para_calc(u32 ir, u8 shaper_level,
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ir_s_calc++;
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ir_calc = DIVISOR_IR_B_126 / (tick * (1 << ir_s_calc));
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}
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+ ir_para->ir_b = (ir * tick * (1 << ir_s_calc) +
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+ (DIVISOR_CLK >> 1)) / DIVISOR_CLK;
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- *ir_b = (ir * tick * (1 << ir_s_calc) + (DIVISOR_CLK >> 1)) /
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- DIVISOR_CLK;
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} else {
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/* Increasing the numerator to select ir_u value */
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u32 numerator;
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@@ -99,15 +98,16 @@ static int hclge_shaper_para_calc(u32 ir, u8 shaper_level,
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}
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if (ir_calc == ir) {
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- *ir_b = 126;
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+ ir_para->ir_b = 126;
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} else {
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u32 denominator = DIVISOR_CLK * (1 << --ir_u_calc);
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- *ir_b = (ir * tick + (denominator >> 1)) / denominator;
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+ ir_para->ir_b = (ir * tick + (denominator >> 1)) /
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+ denominator;
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}
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}
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- *ir_u = ir_u_calc;
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- *ir_s = ir_s_calc;
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+ ir_para->ir_u = ir_u_calc;
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+ ir_para->ir_s = ir_s_calc;
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return 0;
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}
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@@ -400,21 +400,21 @@ int hclge_tm_pg_shapping_cfg(struct hclge_dev *hdev,
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int hclge_tm_port_shaper_cfg(struct hclge_dev *hdev)
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{
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struct hclge_port_shapping_cmd *shap_cfg_cmd;
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+ struct hclge_shaper_ir_para ir_para;
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struct hclge_desc desc;
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- u8 ir_u, ir_b, ir_s;
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u32 shapping_para;
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int ret;
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- ret = hclge_shaper_para_calc(hdev->hw.mac.speed,
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- HCLGE_SHAPER_LVL_PORT,
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- &ir_b, &ir_u, &ir_s);
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+ ret = hclge_shaper_para_calc(hdev->hw.mac.speed, HCLGE_SHAPER_LVL_PORT,
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+ &ir_para);
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if (ret)
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return ret;
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hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_PORT_SHAPPING, false);
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shap_cfg_cmd = (struct hclge_port_shapping_cmd *)desc.data;
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- shapping_para = hclge_tm_get_shapping_para(ir_b, ir_u, ir_s,
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+ shapping_para = hclge_tm_get_shapping_para(ir_para.ir_b, ir_para.ir_u,
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+ ir_para.ir_s,
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HCLGE_SHAPER_BS_U_DEF,
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HCLGE_SHAPER_BS_S_DEF);
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@@ -515,6 +515,7 @@ int hclge_tm_qs_shaper_cfg(struct hclge_vport *vport, int max_tx_rate)
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{
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struct hnae3_knic_private_info *kinfo = &vport->nic.kinfo;
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struct hclge_qs_shapping_cmd *shap_cfg_cmd;
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+ struct hclge_shaper_ir_para ir_para;
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struct hclge_dev *hdev = vport->back;
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struct hclge_desc desc;
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u8 ir_b, ir_u, ir_s;
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@@ -525,11 +526,12 @@ int hclge_tm_qs_shaper_cfg(struct hclge_vport *vport, int max_tx_rate)
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max_tx_rate = HCLGE_ETHER_MAX_RATE;
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ret = hclge_shaper_para_calc(max_tx_rate, HCLGE_SHAPER_LVL_QSET,
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- &ir_b, &ir_u, &ir_s);
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+ &ir_para);
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if (ret)
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return ret;
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- shaper_para = hclge_tm_get_shapping_para(ir_b, ir_u, ir_s,
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+ shaper_para = hclge_tm_get_shapping_para(ir_para.ir_b, ir_para.ir_u,
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+ ir_para.ir_s,
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HCLGE_SHAPER_BS_U_DEF,
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HCLGE_SHAPER_BS_S_DEF);
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@@ -754,7 +756,7 @@ static int hclge_tm_pg_to_pri_map(struct hclge_dev *hdev)
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static int hclge_tm_pg_shaper_cfg(struct hclge_dev *hdev)
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{
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- u8 ir_u, ir_b, ir_s;
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+ struct hclge_shaper_ir_para ir_para;
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u32 shaper_para;
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int ret;
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u32 i;
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@@ -769,7 +771,7 @@ static int hclge_tm_pg_shaper_cfg(struct hclge_dev *hdev)
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ret = hclge_shaper_para_calc(
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hdev->tm_info.pg_info[i].bw_limit,
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HCLGE_SHAPER_LVL_PG,
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- &ir_b, &ir_u, &ir_s);
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+ &ir_para);
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if (ret)
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return ret;
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@@ -782,7 +784,9 @@ static int hclge_tm_pg_shaper_cfg(struct hclge_dev *hdev)
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if (ret)
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return ret;
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- shaper_para = hclge_tm_get_shapping_para(ir_b, ir_u, ir_s,
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+ shaper_para = hclge_tm_get_shapping_para(ir_para.ir_b,
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+ ir_para.ir_u,
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+ ir_para.ir_s,
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HCLGE_SHAPER_BS_U_DEF,
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HCLGE_SHAPER_BS_S_DEF);
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ret = hclge_tm_pg_shapping_cfg(hdev,
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@@ -885,7 +889,7 @@ static int hclge_tm_pri_q_qs_cfg(struct hclge_dev *hdev)
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static int hclge_tm_pri_tc_base_shaper_cfg(struct hclge_dev *hdev)
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{
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- u8 ir_u, ir_b, ir_s;
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+ struct hclge_shaper_ir_para ir_para;
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u32 shaper_para;
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int ret;
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u32 i;
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@@ -894,7 +898,7 @@ static int hclge_tm_pri_tc_base_shaper_cfg(struct hclge_dev *hdev)
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ret = hclge_shaper_para_calc(
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hdev->tm_info.tc_info[i].bw_limit,
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HCLGE_SHAPER_LVL_PRI,
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- &ir_b, &ir_u, &ir_s);
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+ &ir_para);
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if (ret)
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return ret;
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@@ -906,7 +910,9 @@ static int hclge_tm_pri_tc_base_shaper_cfg(struct hclge_dev *hdev)
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if (ret)
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return ret;
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- shaper_para = hclge_tm_get_shapping_para(ir_b, ir_u, ir_s,
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+ shaper_para = hclge_tm_get_shapping_para(ir_para.ir_b,
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+ ir_para.ir_u,
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+ ir_para.ir_s,
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HCLGE_SHAPER_BS_U_DEF,
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HCLGE_SHAPER_BS_S_DEF);
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ret = hclge_tm_pri_shapping_cfg(hdev, HCLGE_TM_SHAP_P_BUCKET, i,
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@@ -921,12 +927,12 @@ static int hclge_tm_pri_tc_base_shaper_cfg(struct hclge_dev *hdev)
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static int hclge_tm_pri_vnet_base_shaper_pri_cfg(struct hclge_vport *vport)
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{
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struct hclge_dev *hdev = vport->back;
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- u8 ir_u, ir_b, ir_s;
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+ struct hclge_shaper_ir_para ir_para;
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u32 shaper_para;
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int ret;
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ret = hclge_shaper_para_calc(vport->bw_limit, HCLGE_SHAPER_LVL_VF,
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- &ir_b, &ir_u, &ir_s);
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+ &ir_para);
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if (ret)
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return ret;
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@@ -938,7 +944,8 @@ static int hclge_tm_pri_vnet_base_shaper_pri_cfg(struct hclge_vport *vport)
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if (ret)
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return ret;
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- shaper_para = hclge_tm_get_shapping_para(ir_b, ir_u, ir_s,
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+ shaper_para = hclge_tm_get_shapping_para(ir_para.ir_b, ir_para.ir_u,
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+ ir_para.ir_s,
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HCLGE_SHAPER_BS_U_DEF,
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HCLGE_SHAPER_BS_S_DEF);
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ret = hclge_tm_pri_shapping_cfg(hdev, HCLGE_TM_SHAP_P_BUCKET,
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@@ -953,7 +960,7 @@ static int hclge_tm_pri_vnet_base_shaper_qs_cfg(struct hclge_vport *vport)
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{
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struct hnae3_knic_private_info *kinfo = &vport->nic.kinfo;
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struct hclge_dev *hdev = vport->back;
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- u8 ir_u, ir_b, ir_s;
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+ struct hclge_shaper_ir_para ir_para;
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u32 i;
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int ret;
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@@ -961,7 +968,7 @@ static int hclge_tm_pri_vnet_base_shaper_qs_cfg(struct hclge_vport *vport)
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ret = hclge_shaper_para_calc(
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hdev->tm_info.tc_info[i].bw_limit,
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HCLGE_SHAPER_LVL_QSET,
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- &ir_b, &ir_u, &ir_s);
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+ &ir_para);
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if (ret)
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return ret;
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}
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diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
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index f172ce32af20..f2dfffbba8c8 100644
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--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
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+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
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@@ -166,6 +166,12 @@ struct hclge_tm_shaper_para {
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u8 flag;
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};
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+struct hclge_shaper_ir_para {
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+ u8 ir_b; /* IR_B parameter of IR shaper */
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+ u8 ir_u; /* IR_U parameter of IR shaper */
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+ u8 ir_s; /* IR_S parameter of IR shaper */
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+};
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+
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#define hclge_tm_set_field(dest, string, val) \
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hnae3_set_field((dest), \
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(HCLGE_TM_SHAP_##string##_MSK), \
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--
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2.34.1
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