75 lines
3.0 KiB
Diff
75 lines
3.0 KiB
Diff
From 478d8d61ceb8d8b1effff96e027020e860f967f3 Mon Sep 17 00:00:00 2001
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From: Luo Jiaxing <luojiaxing@huawei.com>
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Date: Tue, 1 Sep 2020 19:13:04 +0800
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Subject: [PATCH 052/108] scsi: hisi_sas: Modify macro name for OOB phy
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linkrate
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mainline inclusion
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from mainline-v5.10-rc1
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commit 4b3a1f1feda62b0b15536548b6d31ca549de2e3a
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category: feature
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bugzilla: https://gitee.com/src-openeuler/kernel/issues/I8F81L
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Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4b3a1f1feda62b0b15536548b6d31ca549de2e3a
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----------------------------------------------------------------------
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The macro for OOB phy linkrate is named CFG_PROG_PHY_LINK_RATE_* but that
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is inaccurate. For clarification, include OOB in macro name.
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Link: https://lore.kernel.org/r/1598958790-232272-3-git-send-email-john.garry@huawei.com
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Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com>
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Signed-off-by: John Garry <john.garry@huawei.com>
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Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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Signed-off-by: YunYi Yang <yangyunyi2@huawei.com>
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Conflicts:
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drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
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---
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drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 15 +++++++--------
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1 file changed, 7 insertions(+), 8 deletions(-)
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diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
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index ecc91ca8a54d..343160b1f6a3 100644
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--- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
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+++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
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@@ -199,8 +199,8 @@
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#define PHY_CFG_PHY_RST_OFF 3
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#define PHY_CFG_PHY_RST_MSK (0x1 << PHY_CFG_PHY_RST_OFF)
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#define PROG_PHY_LINK_RATE (PORT_BASE + 0x8)
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-#define CFG_PROG_PHY_LINK_RATE_OFF 8
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-#define CFG_PROG_PHY_LINK_RATE_MSK (0xf << CFG_PROG_PHY_LINK_RATE_OFF)
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+#define CFG_PROG_OOB_PHY_LINK_RATE_OFF 8
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+#define CFG_PROG_OOB_PHY_LINK_RATE_MSK (0xf << CFG_PROG_OOB_PHY_LINK_RATE_OFF)
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#define PHY_CTRL (PORT_BASE + 0x14)
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#define PHY_CTRL_RESET_OFF 0
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#define PHY_CTRL_RESET_MSK (0x1 << PHY_CTRL_RESET_OFF)
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@@ -3345,10 +3345,9 @@ static void hisi_sas_bist_test_restore_v3_hw(struct hisi_hba *hisi_hba)
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/*restore the linkrate*/
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reg_val = hisi_sas_phy_read32(hisi_hba, phy_id, PROG_PHY_LINK_RATE);
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/* init OOB link rate as 1.5 Gbits */
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- reg_val &= ~CFG_PROG_PHY_LINK_RATE_MSK;
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- reg_val |= (0x800 << CFG_PROG_PHY_LINK_RATE_OFF);
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- hisi_sas_phy_write32(hisi_hba, phy_id,
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- PROG_PHY_LINK_RATE, reg_val);
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+ reg_val &= ~CFG_PROG_OOB_PHY_LINK_RATE_MSK;
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+ reg_val |= (0x8 << CFG_PROG_OOB_PHY_LINK_RATE_OFF);
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+ hisi_sas_phy_write32(hisi_hba, phy_id, PROG_PHY_LINK_RATE, reg_val);
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/* enable PHY */
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hisi_sas_phy_enable(hisi_hba, phy_id, 1);
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@@ -3372,8 +3371,8 @@ static int debugfs_set_bist_v3_hw(struct hisi_hba *hisi_hba, bool enable)
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/* set linkrate of bit test*/
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reg_val = hisi_sas_phy_read32(hisi_hba, phy_id,
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PROG_PHY_LINK_RATE);
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- reg_val &= ~CFG_PROG_PHY_LINK_RATE_MSK;
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- reg_val |= (linkrate << CFG_PROG_PHY_LINK_RATE_OFF);
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+ reg_val &= ~CFG_PROG_OOB_PHY_LINK_RATE_MSK;
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+ reg_val |= (linkrate << CFG_PROG_OOB_PHY_LINK_RATE_OFF);
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hisi_sas_phy_write32(hisi_hba, phy_id,
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PROG_PHY_LINK_RATE, reg_val);
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--
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2.27.0
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