96 lines
3.8 KiB
Diff
96 lines
3.8 KiB
Diff
From d78a77dcad718be645b3aa5b269a4694346ba598 Mon Sep 17 00:00:00 2001
|
|
From: John Garry <john.garry@huawei.com>
|
|
Date: Wed, 7 Apr 2021 18:32:49 +0800
|
|
Subject: [PATCH 149/201] perf vendor events arm64: Add Hisi hip08 L2 metrics
|
|
|
|
mainline inclusion
|
|
from mainline-v5.13-rc1
|
|
commit 03837173487a1c664b71f047e97209112be37dd5
|
|
category: feature
|
|
bugzilla: https://gitee.com/openeuler/kernel/issues/I8C0CX
|
|
|
|
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=03837173487a1c664b71f047e97209112be37dd5
|
|
|
|
----------------------------------------------------------------------
|
|
|
|
Add L2 metrics.
|
|
|
|
Reviewed-by: Kajol Jain <kjain@linux.ibm.com>
|
|
Signed-off-by: John Garry <john.garry@huawei.com>
|
|
Acked-by: Jiri Olsa <jolsa@redhat.com>
|
|
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
|
|
Cc: Ian Rogers <irogers@google.com>
|
|
Cc: Ingo Molnar <mingo@redhat.com>
|
|
Cc: Kan Liang <kan.liang@linux.intel.com>
|
|
Cc: Leo Yan <leo.yan@linaro.org>
|
|
Cc: Mark Rutland <mark.rutland@arm.com>
|
|
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
|
|
Cc: Namhyung Kim <namhyung@kernel.org>
|
|
Cc: Paul Clarke <pc@us.ibm.com>
|
|
Cc: Peter Zijlstra <peterz@infradead.org>
|
|
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
|
|
Cc: Will Deacon <will@kernel.org>
|
|
Cc: linux-arm-kernel@lists.infradead.org
|
|
Cc: linuxarm@huawei.com
|
|
Link: https://lore.kernel.org/r/1617791570-165223-6-git-send-email-john.garry@huawei.com
|
|
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Signed-off-by: hongrongxuan <hongrongxuan@huawei.com>
|
|
---
|
|
.../arch/arm64/hisilicon/hip08/metrics.json | 42 +++++++++++++++++++
|
|
1 file changed, 42 insertions(+)
|
|
|
|
diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
|
|
index dc5ff3051639..dda898d23c2d 100644
|
|
--- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
|
|
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
|
|
@@ -27,4 +27,46 @@
|
|
"MetricGroup": "TopDownL1",
|
|
"MetricName": "backend_bound"
|
|
},
|
|
+ {
|
|
+ "MetricExpr": "armv8_pmuv3_0@event\\=0x201d@ / CPU_CYCLES",
|
|
+ "PublicDescription": "Fetch latency bound L2 topdown metric",
|
|
+ "BriefDescription": "Fetch latency bound L2 topdown metric",
|
|
+ "MetricGroup": "TopDownL2",
|
|
+ "MetricName": "fetch_latency_bound"
|
|
+ },
|
|
+ {
|
|
+ "MetricExpr": "frontend_bound - fetch_latency_bound",
|
|
+ "PublicDescription": "Fetch bandwidth bound L2 topdown metric",
|
|
+ "BriefDescription": "Fetch bandwidth bound L2 topdown metric",
|
|
+ "MetricGroup": "TopDownL2",
|
|
+ "MetricName": "fetch_bandwidth_bound"
|
|
+ },
|
|
+ {
|
|
+ "MetricExpr": "(bad_speculation * BR_MIS_PRED) / (BR_MIS_PRED + armv8_pmuv3_0@event\\=0x2013@)",
|
|
+ "PublicDescription": "Branch mispredicts L2 topdown metric",
|
|
+ "BriefDescription": "Branch mispredicts L2 topdown metric",
|
|
+ "MetricGroup": "TopDownL2",
|
|
+ "MetricName": "branch_mispredicts"
|
|
+ },
|
|
+ {
|
|
+ "MetricExpr": "bad_speculation - branch_mispredicts",
|
|
+ "PublicDescription": "Machine clears L2 topdown metric",
|
|
+ "BriefDescription": "Machine clears L2 topdown metric",
|
|
+ "MetricGroup": "TopDownL2",
|
|
+ "MetricName": "machine_clears"
|
|
+ },
|
|
+ {
|
|
+ "MetricExpr": "(EXE_STALL_CYCLE - (MEM_STALL_ANYLOAD + armv8_pmuv3_0@event\\=0x7005@)) / CPU_CYCLES",
|
|
+ "PublicDescription": "Core bound L2 topdown metric",
|
|
+ "BriefDescription": "Core bound L2 topdown metric",
|
|
+ "MetricGroup": "TopDownL2",
|
|
+ "MetricName": "core_bound"
|
|
+ },
|
|
+ {
|
|
+ "MetricExpr": "(MEM_STALL_ANYLOAD + armv8_pmuv3_0@event\\=0x7005@) / CPU_CYCLES",
|
|
+ "PublicDescription": "Memory bound L2 topdown metric",
|
|
+ "BriefDescription": "Memory bound L2 topdown metric",
|
|
+ "MetricGroup": "TopDownL2",
|
|
+ "MetricName": "memory_bound"
|
|
+ },
|
|
]
|
|
--
|
|
2.27.0
|
|
|