390 lines
12 KiB
Diff
390 lines
12 KiB
Diff
From b76c5cef9b2af923a0c4b0e62d493f4be1ee6176 Mon Sep 17 00:00:00 2001
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From: John Garry <john.garry@huawei.com>
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Date: Thu, 29 Jul 2021 21:56:18 +0800
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Subject: [PATCH 173/201] perf test: Declare pmu-events test events separately
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mainline inclusion
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from mainline-v5.15-rc1
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commit c81e823ff8667f19d2b6ee0ab0e919e3043abd36
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category: feature
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bugzilla: https://gitee.com/openeuler/kernel/issues/I8C0CX
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Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c81e823ff8667f19d2b6ee0ab0e919e3043abd36
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----------------------------------------------------------------------
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Currently all test events are put into arrays of test events.
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Create pointer arrays of test events instead, so the test events may be
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referenced later for tighter alias verification.
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Signed-off-by: John Garry <john.garry@huawei.com>
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Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
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Cc: Ian Rogers <irogers@google.com>
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Cc: Ingo Molnar <mingo@redhat.com>
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Cc: Jin Yao <yao.jin@linux.intel.com>
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Cc: Jiri Olsa <jolsa@redhat.com>
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Cc: Mark Rutland <mark.rutland@arm.com>
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Cc: Namhyung Kim <namhyung@kernel.org>
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Cc: Peter Zijlstra <peterz@infradead.org>
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Cc: linuxarm@huawei.com
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Link: https //lore.kernel.org/r/1627566986-30605-4-git-send-email-john.garry@huawei.com
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Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Signed-off-by: hongrongxuan <hongrongxuan@huawei.com>
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---
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tools/perf/tests/pmu-events.c | 244 ++++++++++++++++++----------------
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1 file changed, 126 insertions(+), 118 deletions(-)
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diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c
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index 47b5fec7edbf..555f01164632 100644
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--- a/tools/perf/tests/pmu-events.c
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+++ b/tools/perf/tests/pmu-events.c
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@@ -30,108 +30,114 @@ struct perf_pmu_test_event {
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const char *alias_long_desc;
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};
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-static struct perf_pmu_test_event test_cpu_events[] = {
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- {
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- .event = {
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- .name = "bp_l1_btb_correct",
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- .event = "event=0x8a",
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- .desc = "L1 BTB Correction",
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- .topic = "branch",
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- },
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- .alias_str = "event=0x8a",
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- .alias_long_desc = "L1 BTB Correction",
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- },
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- {
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- .event = {
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- .name = "bp_l2_btb_correct",
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- .event = "event=0x8b",
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- .desc = "L2 BTB Correction",
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- .topic = "branch",
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- },
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- .alias_str = "event=0x8b",
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- .alias_long_desc = "L2 BTB Correction",
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+static const struct perf_pmu_test_event bp_l1_btb_correct = {
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+ .event = {
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+ .name = "bp_l1_btb_correct",
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+ .event = "event=0x8a",
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+ .desc = "L1 BTB Correction",
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+ .topic = "branch",
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},
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- {
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- .event = {
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- .name = "segment_reg_loads.any",
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- .event = "umask=0x80,period=200000,event=0x6",
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- .desc = "Number of segment register loads",
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- .topic = "other",
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- },
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- .alias_str = "umask=0x80,(null)=0x30d40,event=0x6",
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- .alias_long_desc = "Number of segment register loads",
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+ .alias_str = "event=0x8a",
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+ .alias_long_desc = "L1 BTB Correction",
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+};
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+
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+static const struct perf_pmu_test_event bp_l2_btb_correct = {
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+ .event = {
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+ .name = "bp_l2_btb_correct",
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+ .event = "event=0x8b",
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+ .desc = "L2 BTB Correction",
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+ .topic = "branch",
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},
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- {
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- .event = {
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- .name = "dispatch_blocked.any",
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- .event = "umask=0x20,period=200000,event=0x9",
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- .desc = "Memory cluster signals to block micro-op dispatch for any reason",
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- .topic = "other",
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- },
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- .alias_str = "umask=0x20,(null)=0x30d40,event=0x9",
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- .alias_long_desc = "Memory cluster signals to block micro-op dispatch for any reason",
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+ .alias_str = "event=0x8b",
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+ .alias_long_desc = "L2 BTB Correction",
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+};
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+
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+static const struct perf_pmu_test_event segment_reg_loads_any = {
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+ .event = {
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+ .name = "segment_reg_loads.any",
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+ .event = "umask=0x80,period=200000,event=0x6",
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+ .desc = "Number of segment register loads",
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+ .topic = "other",
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},
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- {
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- .event = {
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- .name = "eist_trans",
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- .event = "umask=0x0,period=200000,event=0x3a",
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- .desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions",
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- .topic = "other",
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- },
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- .alias_str = "umask=0,(null)=0x30d40,event=0x3a",
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- .alias_long_desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions",
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+ .alias_str = "umask=0x80,(null)=0x30d40,event=0x6",
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+ .alias_long_desc = "Number of segment register loads",
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+};
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+
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+static const struct perf_pmu_test_event dispatch_blocked_any = {
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+ .event = {
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+ .name = "dispatch_blocked.any",
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+ .event = "umask=0x20,period=200000,event=0x9",
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+ .desc = "Memory cluster signals to block micro-op dispatch for any reason",
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+ .topic = "other",
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},
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- {
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- .event = {
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- .name = "l3_cache_rd",
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- .event = "event=0x40",
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- .desc = "L3 cache access, read",
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- .long_desc = "Attributable Level 3 cache access, read",
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- .topic = "cache",
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- },
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- .alias_str = "event=0x40",
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- .alias_long_desc = "Attributable Level 3 cache access, read",
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+ .alias_str = "umask=0x20,(null)=0x30d40,event=0x9",
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+ .alias_long_desc = "Memory cluster signals to block micro-op dispatch for any reason",
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+};
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+
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+static const struct perf_pmu_test_event eist_trans = {
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+ .event = {
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+ .name = "eist_trans",
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+ .event = "umask=0x0,period=200000,event=0x3a",
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+ .desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions",
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+ .topic = "other",
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},
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- { /* sentinel */
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- .event = {
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- .name = NULL,
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- },
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+ .alias_str = "umask=0,(null)=0x30d40,event=0x3a",
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+ .alias_long_desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions",
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+};
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+
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+static const struct perf_pmu_test_event l3_cache_rd = {
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+ .event = {
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+ .name = "l3_cache_rd",
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+ .event = "event=0x40",
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+ .desc = "L3 cache access, read",
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+ .long_desc = "Attributable Level 3 cache access, read",
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+ .topic = "cache",
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},
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+ .alias_str = "event=0x40",
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+ .alias_long_desc = "Attributable Level 3 cache access, read",
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};
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-static struct perf_pmu_test_event test_uncore_events[] = {
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- {
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- .event = {
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- .name = "uncore_hisi_ddrc.flux_wcmd",
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- .event = "event=0x2",
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- .desc = "DDRC write commands. Unit: hisi_sccl,ddrc ",
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- .topic = "uncore",
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- .long_desc = "DDRC write commands",
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- .pmu = "hisi_sccl,ddrc",
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- },
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- .alias_str = "event=0x2",
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- .alias_long_desc = "DDRC write commands",
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+static const struct perf_pmu_test_event *core_events[] = {
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+ &bp_l1_btb_correct,
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+ &bp_l2_btb_correct,
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+ &segment_reg_loads_any,
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+ &dispatch_blocked_any,
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+ &eist_trans,
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+ &l3_cache_rd,
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+ NULL
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+};
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+
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+static const struct perf_pmu_test_event uncore_hisi_ddrc_flux_wcmd = {
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+ .event = {
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+ .name = "uncore_hisi_ddrc.flux_wcmd",
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+ .event = "event=0x2",
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+ .desc = "DDRC write commands. Unit: hisi_sccl,ddrc ",
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+ .topic = "uncore",
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+ .long_desc = "DDRC write commands",
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+ .pmu = "hisi_sccl,ddrc",
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},
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- {
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- .event = {
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- .name = "unc_cbo_xsnp_response.miss_eviction",
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- .event = "umask=0x81,event=0x22",
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- .desc = "Unit: uncore_cbox A cross-core snoop resulted from L3 Eviction which misses in some processor core",
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- .topic = "uncore",
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- .long_desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core",
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- .pmu = "uncore_cbox",
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- },
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- .alias_str = "umask=0x81,event=0x22",
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- .alias_long_desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core",
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+ .alias_str = "event=0x2",
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+ .alias_long_desc = "DDRC write commands",
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+};
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+
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+static const struct perf_pmu_test_event unc_cbo_xsnp_response_miss_eviction = {
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+ .event = {
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+ .name = "unc_cbo_xsnp_response.miss_eviction",
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+ .event = "umask=0x81,event=0x22",
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+ .desc = "Unit: uncore_cbox A cross-core snoop resulted from L3 Eviction which misses in some processor core",
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+ .topic = "uncore",
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+ .long_desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core",
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+ .pmu = "uncore_cbox",
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},
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- { /* sentinel */
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- .event = {
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- .name = NULL,
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- },
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- }
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+ .alias_str = "umask=0x81,event=0x22",
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+ .alias_long_desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core",
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};
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-const int total_test_events_size = ARRAY_SIZE(test_uncore_events);
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+static const struct perf_pmu_test_event *uncore_events[] = {
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+ &uncore_hisi_ddrc_flux_wcmd,
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+ &unc_cbo_xsnp_response_miss_eviction,
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+ NULL
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+};
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static bool is_same(const char *reference, const char *test)
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{
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@@ -226,7 +232,7 @@ static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2)
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return 0;
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}
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-/* Verify generated events from pmu-events.c is as expected */
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+/* Verify generated events from pmu-events.c are as expected */
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static int test_pmu_event_table(void)
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{
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struct pmu_events_map *map = __test_pmu_get_events_map();
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@@ -234,31 +240,31 @@ static int test_pmu_event_table(void)
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int map_events = 0, expected_events;
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/* ignore 2x sentinels */
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- expected_events = ARRAY_SIZE(test_cpu_events) +
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- ARRAY_SIZE(test_uncore_events) - 2;
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+ expected_events = ARRAY_SIZE(core_events) +
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+ ARRAY_SIZE(uncore_events) - 2;
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if (!map)
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return -1;
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for (table = map->table; table->name; table++) {
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- struct perf_pmu_test_event *test;
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- struct pmu_event *te;
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+ struct perf_pmu_test_event const **test_event_table;
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bool found = false;
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if (table->pmu)
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- test = &test_uncore_events[0];
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+ test_event_table = &uncore_events[0];
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else
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- test = &test_cpu_events[0];
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+ test_event_table = &core_events[0];
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- te = &test->event;
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+ for (; *test_event_table; test_event_table++) {
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+ struct perf_pmu_test_event const *test_event = *test_event_table;
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+ struct pmu_event const *event = &test_event->event;
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- for (; te->name; test++, te = &test->event) {
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- if (strcmp(table->name, te->name))
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+ if (strcmp(table->name, event->name))
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continue;
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found = true;
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map_events++;
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- if (compare_pmu_events(table, te))
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+ if (compare_pmu_events(table, event))
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return -1;
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pr_debug("testing event table %s: pass\n", table->name);
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@@ -294,8 +300,7 @@ static struct perf_pmu_alias *find_alias(const char *test_event, struct list_hea
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/* Verify aliases are as expected */
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static int __test__pmu_event_aliases(char *pmu_name, int *count)
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{
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- struct perf_pmu_test_event *test;
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- struct pmu_event *te;
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+ struct perf_pmu_test_event const **test_event_table;
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struct perf_pmu *pmu;
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LIST_HEAD(aliases);
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int res = 0;
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@@ -307,10 +312,10 @@ static int __test__pmu_event_aliases(char *pmu_name, int *count)
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return -1;
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if (is_pmu_core(pmu_name)) {
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- test = &test_cpu_events[0];
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+ test_event_table = &core_events[0];
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use_uncore_table = false;
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} else {
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- test = &test_uncore_events[0];
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+ test_event_table = &uncore_events[0];
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use_uncore_table = true;
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}
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@@ -322,50 +327,53 @@ static int __test__pmu_event_aliases(char *pmu_name, int *count)
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pmu_add_cpu_aliases_map(&aliases, pmu, map);
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- for (te = &test->event; te->name; test++, te = &test->event) {
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- struct perf_pmu_alias *alias = find_alias(te->name, &aliases);
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+ for (; *test_event_table; test_event_table++) {
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+ struct perf_pmu_test_event const *test_event = *test_event_table;
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+ struct pmu_event const *event = &test_event->event;
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+
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+ struct perf_pmu_alias *alias = find_alias(event->name, &aliases);
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if (!alias) {
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bool uncore_match = pmu_uncore_alias_match(pmu_name,
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- te->pmu);
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+ event->pmu);
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if (use_uncore_table && !uncore_match) {
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pr_debug3("testing aliases PMU %s: skip matching alias %s\n",
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- pmu_name, te->name);
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+ pmu_name, event->name);
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continue;
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}
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pr_debug2("testing aliases PMU %s: no alias, alias_table->name=%s\n",
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- pmu_name, te->name);
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+ pmu_name, event->name);
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res = -1;
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break;
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}
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- if (!is_same(alias->desc, te->desc)) {
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+ if (!is_same(alias->desc, event->desc)) {
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pr_debug2("testing aliases PMU %s: mismatched desc, %s vs %s\n",
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- pmu_name, alias->desc, te->desc);
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+ pmu_name, alias->desc, event->desc);
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res = -1;
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break;
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}
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- if (!is_same(alias->long_desc, test->alias_long_desc)) {
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+ if (!is_same(alias->long_desc, test_event->alias_long_desc)) {
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pr_debug2("testing aliases PMU %s: mismatched long_desc, %s vs %s\n",
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pmu_name, alias->long_desc,
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- test->alias_long_desc);
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+ test_event->alias_long_desc);
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res = -1;
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break;
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}
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- if (!is_same(alias->str, test->alias_str)) {
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+ if (!is_same(alias->str, test_event->alias_str)) {
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pr_debug2("testing aliases PMU %s: mismatched str, %s vs %s\n",
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- pmu_name, alias->str, test->alias_str);
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+ pmu_name, alias->str, test_event->alias_str);
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res = -1;
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break;
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}
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- if (!is_same(alias->topic, te->topic)) {
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+ if (!is_same(alias->topic, event->topic)) {
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pr_debug2("testing aliases PMU %s: mismatched topic, %s vs %s\n",
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- pmu_name, alias->topic, te->topic);
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+ pmu_name, alias->topic, event->topic);
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res = -1;
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break;
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}
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--
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2.27.0
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