87 lines
2.9 KiB
Diff
87 lines
2.9 KiB
Diff
From 2bbf35baac46c41879f770e2273134192a565f86 Mon Sep 17 00:00:00 2001
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From: Zhang Zekun <zhangzekun11@huawei.com>
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Date: Sat, 4 Mar 2023 07:24:36 +0000
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Subject: [PATCH 45/55] perf: hisi: Add configs for PMU isolation
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hulk inclusion
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category: feature
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bugzilla: https://gitee.com/openeuler/kernel/issues/I6HRGK
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------------------------------------------
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Add CONFIG_HISI_L3T_PMU and CONFIG_HISI_LPDDRC_PMU to isolate features
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of hisi pmu driver.
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This patch isolates commit 0edc58409e30 and 6bf896bea639.
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Signed-off-by: Zhang Zekun <zhangzekun11@huawei.com>
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Signed-off-by: hongrongxuan <hongrongxuan@huawei.com>
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Conflicts:
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drivers/perf/hisilicon/Kconfig
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drivers/perf/hisilicon/Makefile
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---
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arch/arm64/configs/openeuler_defconfig | 2 ++
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drivers/perf/hisilicon/Kconfig | 18 ++++++++++++++++++
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drivers/perf/hisilicon/Makefile | 6 +++---
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3 files changed, 23 insertions(+), 3 deletions(-)
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diff --git a/arch/arm64/configs/openeuler_defconfig b/arch/arm64/configs/openeuler_defconfig
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index 6a7497f2df95..db461e4c2dae 100644
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--- a/arch/arm64/configs/openeuler_defconfig
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+++ b/arch/arm64/configs/openeuler_defconfig
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@@ -5108,6 +5108,8 @@ CONFIG_QCOM_L3_PMU=y
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CONFIG_XGENE_PMU=y
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CONFIG_ARM_SPE_PMU=y
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CONFIG_HISI_PMU=m
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+CONFIG_HISI_L3T_PMU=m
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+CONFIG_HISI_LPDDRC_PMU=m
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CONFIG_HISI_PCIE_PMU=m
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CONFIG_RAS=y
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diff --git a/drivers/perf/hisilicon/Kconfig b/drivers/perf/hisilicon/Kconfig
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index 5546218b5598..91a6e2463180 100644
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--- a/drivers/perf/hisilicon/Kconfig
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+++ b/drivers/perf/hisilicon/Kconfig
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@@ -14,3 +14,21 @@ config HISI_PCIE_PMU
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RCiEP devices.
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Adds the PCIe PMU into perf events system for monitoring latency,
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bandwidth etc.
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+
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+config HISI_L3T_PMU
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+ tristate "HiSilicon SoC L3T PMU drivers"
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+ depends on HISI_PMU
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+ default n
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+ help
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+ Support for HiSilicon SoC L3 Cache performance monitor, Hydra Home
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+ Agent performance monitor and DDR Controller performance monitor.
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+ L3T is a specialized PMU driver.
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+
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+config HISI_LPDDRC_PMU
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+ tristate "HiSilicon SoC LDPPRC PMU drivers"
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+ depends on HISI_PMU
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+ default n
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+ help
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+ Support for HiSilicon SoC L3 Cache performance monitor, Hydra Home
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+ Agent performance monitor and DDR Controller performance monitor.
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+ LPDDRC is a specialize PMU driver.
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diff --git a/drivers/perf/hisilicon/Makefile b/drivers/perf/hisilicon/Makefile
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index a3522abb3975..26d678eb3250 100644
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--- a/drivers/perf/hisilicon/Makefile
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+++ b/drivers/perf/hisilicon/Makefile
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@@ -1,8 +1,8 @@
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# SPDX-License-Identifier: GPL-2.0-only
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obj-$(CONFIG_HISI_PMU) += hisi_uncore_pmu.o hisi_uncore_l3c_pmu.o \
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hisi_uncore_hha_pmu.o hisi_uncore_ddrc_pmu.o hisi_uncore_sllc_pmu.o \
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- hisi_uncore_pa_pmu.o hisi_uncore_cpa_pmu.o \
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- hisi_uncore_l3t_pmu.o \
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- hisi_uncore_lpddrc_pmu.o
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+ hisi_uncore_pa_pmu.o hisi_uncore_cpa_pmu.o
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obj-$(CONFIG_HISI_PCIE_PMU) += hisi_pcie_pmu.o
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+obj-$(CONFIG_HISI_L3T_PMU) += hisi_uncore_l3t_pmu.o
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+obj-$(CONFIG_HISI_LPDDRC_PMU) += hisi_uncore_lpddrc_pmu.o
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--
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2.27.0
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