194 lines
7.1 KiB
Diff
194 lines
7.1 KiB
Diff
From 34861133469cfd5c5851f7f4ab05e3d3af1dd13a Mon Sep 17 00:00:00 2001
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From: Shaokun Zhang <zhangshaokun@hisilicon.com>
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Date: Fri, 30 Jul 2021 15:44:02 +0800
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Subject: [PATCH 13/55] drivers/perf: hisi: Remove unnecessary check of counter
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index
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mainline inclusion
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from mainline-v5.12-rc3
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commit 4e4cb8ca48bd68c00df67c10ff867016abb7391f
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category: cleanup
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bugzilla: 175148
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CVE: NA
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Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4e4cb8ca48bd68c00df67c10ff867016abb7391f
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------------------------------------------------------------------------
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The sanity check for counter index has been done in the function
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hisi_uncore_pmu_get_event_idx, so remove the redundant interface
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hisi_uncore_pmu_counter_valid() and sanity check.
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Cc: Mark Rutland <mark.rutland@arm.com>
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Cc: Will Deacon <will@kernel.org>
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Cc: John Garry <john.garry@huawei.com>
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Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Co-developed-by: Qi Liu <liuqi115@huawei.com>
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Signed-off-by: Qi Liu <liuqi115@huawei.com>
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Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
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Link: https://lore.kernel.org/r/1615186237-22263-2-git-send-email-zhangshaokun@hisilicon.com
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Signed-off-by: Will Deacon <will@kernel.org>
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Reviewed-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
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Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com>
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Signed-off-by: hongrongxuan <hongrongxuan@huawei.com>
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---
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drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 20 +++----------------
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drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 18 ++---------------
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drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 18 ++---------------
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drivers/perf/hisilicon/hisi_uncore_pmu.c | 11 ----------
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drivers/perf/hisilicon/hisi_uncore_pmu.h | 1 -
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5 files changed, 7 insertions(+), 61 deletions(-)
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diff --git a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
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index a88c7d840d38..bcb2c2d66b7f 100644
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--- a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
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+++ b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
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@@ -68,29 +68,15 @@ static u32 hisi_ddrc_pmu_get_counter_offset(int cntr_idx)
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static u64 hisi_ddrc_pmu_read_counter(struct hisi_pmu *ddrc_pmu,
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struct hw_perf_event *hwc)
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{
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- /* Use event code as counter index */
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- u32 idx = GET_DDRC_EVENTID(hwc);
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-
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- if (!hisi_uncore_pmu_counter_valid(ddrc_pmu, idx)) {
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- dev_err(ddrc_pmu->dev, "Unsupported event index:%d!\n", idx);
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- return 0;
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- }
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-
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- return readl(ddrc_pmu->base + hisi_ddrc_pmu_get_counter_offset(idx));
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+ return readl(ddrc_pmu->base +
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+ hisi_ddrc_pmu_get_counter_offset(hwc->idx));
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}
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static void hisi_ddrc_pmu_write_counter(struct hisi_pmu *ddrc_pmu,
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struct hw_perf_event *hwc, u64 val)
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{
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- u32 idx = GET_DDRC_EVENTID(hwc);
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-
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- if (!hisi_uncore_pmu_counter_valid(ddrc_pmu, idx)) {
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- dev_err(ddrc_pmu->dev, "Unsupported event index:%d!\n", idx);
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- return;
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- }
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-
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writel((u32)val,
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- ddrc_pmu->base + hisi_ddrc_pmu_get_counter_offset(idx));
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+ ddrc_pmu->base + hisi_ddrc_pmu_get_counter_offset(hwc->idx));
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}
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/*
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diff --git a/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c b/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
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index 1e0138bbe6e7..de1766342b4e 100644
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--- a/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
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+++ b/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
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@@ -54,29 +54,15 @@ static u32 hisi_hha_pmu_get_counter_offset(u32 cntr_idx)
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static u64 hisi_hha_pmu_read_counter(struct hisi_pmu *hha_pmu,
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struct hw_perf_event *hwc)
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{
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- u32 idx = hwc->idx;
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-
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- if (!hisi_uncore_pmu_counter_valid(hha_pmu, idx)) {
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- dev_err(hha_pmu->dev, "Unsupported event index:%d!\n", idx);
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- return 0;
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- }
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-
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/* Read 64 bits and like L3C, top 16 bits are RAZ */
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- return readq(hha_pmu->base + hisi_hha_pmu_get_counter_offset(idx));
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+ return readq(hha_pmu->base + hisi_hha_pmu_get_counter_offset(hwc->idx));
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}
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static void hisi_hha_pmu_write_counter(struct hisi_pmu *hha_pmu,
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struct hw_perf_event *hwc, u64 val)
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{
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- u32 idx = hwc->idx;
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-
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- if (!hisi_uncore_pmu_counter_valid(hha_pmu, idx)) {
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- dev_err(hha_pmu->dev, "Unsupported event index:%d!\n", idx);
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- return;
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- }
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-
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/* Write 64 bits and like L3C, top 16 bits are WI */
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- writeq(val, hha_pmu->base + hisi_hha_pmu_get_counter_offset(idx));
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+ writeq(val, hha_pmu->base + hisi_hha_pmu_get_counter_offset(hwc->idx));
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}
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static void hisi_hha_pmu_write_evtype(struct hisi_pmu *hha_pmu, int idx,
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diff --git a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
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index 1707ae551ece..c4afeaaaa3a4 100644
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--- a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
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+++ b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
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@@ -53,29 +53,15 @@ static u32 hisi_l3c_pmu_get_counter_offset(u32 cntr_idx)
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static u64 hisi_l3c_pmu_read_counter(struct hisi_pmu *l3c_pmu,
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struct hw_perf_event *hwc)
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{
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- u32 idx = hwc->idx;
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-
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- if (!hisi_uncore_pmu_counter_valid(l3c_pmu, idx)) {
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- dev_err(l3c_pmu->dev, "Unsupported event index:%d!\n", idx);
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- return 0;
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- }
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-
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/* Read 64-bits and the upper 16 bits are RAZ */
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- return readq(l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(idx));
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+ return readq(l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(hwc->idx));
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}
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static void hisi_l3c_pmu_write_counter(struct hisi_pmu *l3c_pmu,
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struct hw_perf_event *hwc, u64 val)
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{
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- u32 idx = hwc->idx;
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-
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- if (!hisi_uncore_pmu_counter_valid(l3c_pmu, idx)) {
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- dev_err(l3c_pmu->dev, "Unsupported event index:%d!\n", idx);
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- return;
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- }
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-
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/* Write 64-bits and the upper 16 bits are WI */
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- writeq(val, l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(idx));
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+ writeq(val, l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(hwc->idx));
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}
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static void hisi_l3c_pmu_write_evtype(struct hisi_pmu *l3c_pmu, int idx,
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diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisilicon/hisi_uncore_pmu.c
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index f6a992da24bf..9ebdb76dd3a4 100644
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--- a/drivers/perf/hisilicon/hisi_uncore_pmu.c
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+++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c
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@@ -99,12 +99,6 @@ static bool hisi_validate_event_group(struct perf_event *event)
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return counters <= hisi_pmu->num_counters;
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}
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-int hisi_uncore_pmu_counter_valid(struct hisi_pmu *hisi_pmu, int idx)
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-{
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- return idx >= 0 && idx < hisi_pmu->num_counters;
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-}
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-EXPORT_SYMBOL_GPL(hisi_uncore_pmu_counter_valid);
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-
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int hisi_uncore_pmu_get_event_idx(struct perf_event *event)
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{
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struct hisi_pmu *hisi_pmu = to_hisi_pmu(event->pmu);
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@@ -134,11 +128,6 @@ EXPORT_SYMBOL_GPL(hisi_uncore_pmu_identifier_attr_show);
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static void hisi_uncore_pmu_clear_event_idx(struct hisi_pmu *hisi_pmu, int idx)
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{
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- if (!hisi_uncore_pmu_counter_valid(hisi_pmu, idx)) {
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- dev_err(hisi_pmu->dev, "Unsupported event index:%d!\n", idx);
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- return;
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- }
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-
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clear_bit(idx, hisi_pmu->pmu_events.used_mask);
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}
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diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.h b/drivers/perf/hisilicon/hisi_uncore_pmu.h
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index 098a8f6dc7ee..d71a6c86b282 100644
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--- a/drivers/perf/hisilicon/hisi_uncore_pmu.h
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+++ b/drivers/perf/hisilicon/hisi_uncore_pmu.h
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@@ -81,7 +81,6 @@ struct hisi_pmu {
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u32 identifier;
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};
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-int hisi_uncore_pmu_counter_valid(struct hisi_pmu *hisi_pmu, int idx);
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int hisi_uncore_pmu_get_event_idx(struct perf_event *event);
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void hisi_uncore_pmu_read(struct perf_event *event);
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int hisi_uncore_pmu_add(struct perf_event *event, int flags);
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--
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2.27.0
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