From 09f73e2e9bba97398fa7a66affaa0e820ac16b5c Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 24 Oct 2019 16:59:55 +0300 Subject: [PATCH 10/39] mtd: spi-nor: Pointer parameter for CR in spi_nor_read_cr() mainline inclusion from mainline-v5.5-rc1 commit b662d398ccf114a80c92140287a6507efb3e2dfc category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I8CSBP CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=b662d398ccf114a80c92140287a6507efb3e2dfc ---------------------------------------------------------------------------- Let the callers pass the pointer to the DMA-able buffer where the value of the Configuration Register will be written. This way we avoid the casts between int and u8, which can be confusing. Callers stop compare the return value of spi_nor_read_cr() with negative, spi_nor_read_cr() returns 0 on success and -errno otherwise. Signed-off-by: Tudor Ambarus Reviewed-by: Boris Brezillon Signed-off-by: YunYi Yang Conflicts: drivers/mtd/spi-nor/spi-nor.c --- drivers/mtd/spi-nor/spi-nor.c | 46 ++++++++++++++++++++--------------- 1 file changed, 27 insertions(+), 19 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 766ad458197e..f1e92f63cab6 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -306,12 +306,16 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) return ret; } -/* - * Read configuration register, returning its value in the - * location. Return the configuration register value. - * Returns negative if error occurred. +/** + * spi_nor_read_cr() - Read the Configuration Register using the + * SPINOR_OP_RDCR (35h) command. + * @nor: pointer to 'struct spi_nor' + * @cr: pointer to a DMA-able buffer where the value of the + * Configuration Register will be written. + * + * Return: 0 on success, -errno otherwise. */ -static int spi_nor_read_cr(struct spi_nor *nor) +static int spi_nor_read_cr(struct spi_nor *nor, u8 *cr) { int ret; @@ -320,19 +324,17 @@ static int spi_nor_read_cr(struct spi_nor *nor) SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 1), SPI_MEM_OP_NO_ADDR, SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_DATA_IN(1, nor->bouncebuf, 1)); + SPI_MEM_OP_DATA_IN(1, cr, 1)); ret = spi_mem_exec_op(nor->spimem, &op); } else { - ret = nor->read_reg(nor, SPINOR_OP_RDCR, nor->bouncebuf, 1); + ret = nor->read_reg(nor, SPINOR_OP_RDCR, cr, 1); } - if (ret) { + if (ret) dev_err(nor->dev, "error %d reading CR\n", ret); - return ret; - } - return nor->bouncebuf[0]; + return ret; } /* @@ -1971,8 +1973,11 @@ static int spansion_quad_enable(struct spi_nor *nor) return ret; /* read back and check it */ - ret = spi_nor_read_cr(nor); - if (!(ret > 0 && (ret & CR_QUAD_EN_SPAN))) { + ret = spi_nor_read_cr(nor, nor->bouncebuf); + if (ret) + return ret; + + if (!(nor->bouncebuf[0] & CR_QUAD_EN_SPAN)) { dev_err(nor->dev, "Spansion Quad bit not set\n"); return -EINVAL; } @@ -2029,16 +2034,16 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor) int ret; /* Check current Quad Enable bit value. */ - ret = spi_nor_read_cr(nor); - if (ret < 0) { + ret = spi_nor_read_cr(nor, &sr_cr[1]); + if (ret) { dev_err(dev, "error while reading configuration register\n"); return -EINVAL; } - if (ret & CR_QUAD_EN_SPAN) + if (sr_cr[1] & CR_QUAD_EN_SPAN) return 0; - sr_cr[1] = ret | CR_QUAD_EN_SPAN; + sr_cr[1] |= CR_QUAD_EN_SPAN; /* Keep the current value of the Status Register. */ ret = spi_nor_read_sr(nor, sr_cr); @@ -2052,8 +2057,11 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor) return ret; /* Read back and check it. */ - ret = spi_nor_read_cr(nor); - if (!(ret > 0 && (ret & CR_QUAD_EN_SPAN))) { + ret = spi_nor_read_cr(nor, &sr_cr[1]); + if (ret) + return ret; + + if (!(sr_cr[1] & CR_QUAD_EN_SPAN)) { dev_err(nor->dev, "Spansion Quad bit not set\n"); return -EINVAL; } -- 2.27.0