diff --git a/kernel.spec b/kernel.spec index ed5e38c..c0bd82f 100644 --- a/kernel.spec +++ b/kernel.spec @@ -32,7 +32,7 @@ Name: kernel Version: 4.19.90 -Release: %{hulkrelease}.0227 +Release: %{hulkrelease}.0228 Summary: Linux Kernel License: GPLv2 URL: http://www.kernel.org/ @@ -830,6 +830,26 @@ fi %endif %changelog +* Tue Oct 31 2023 hongrongxuan - 4.19.90-2310.4.0.0228 +- drivers/perf: Add support for ARMv8.3-SPE +- perf arm-spe: Add support for ARMv8.3-SPE +- perf arm_spe: Decode memory tagging properties +- perf arm-spe: Add more sub classes for operation packet +- perf arm-spe: Refactor operation packet handling +- perf arm-spe: Add new function arm_spe_pkt_desc_op_type() +- perf arm-spe: Remove size condition checking for events +- perf arm-spe: Refactor event type handling +- perf arm-spe: Add new function arm_spe_pkt_desc_event() +- perf arm-spe: Refactor counter packet handling +- perf arm-spe: Add new function arm_spe_pkt_desc_counter() +- perf arm-spe: Refactor context packet handling +- perf arm-spe: Refactor address packet handling +- perf arm-spe: Add new function arm_spe_pkt_desc_addr() +- perf arm-spe: Refactor packet header parsing +- perf arm-spe: Refactor printing string to buffer +- perf arm-spe: Fix packet length handling +- perf arm-spe: Refactor arm_spe_get_events() + * Mon Oct 30 2023 Keyi Zhong - 4.19.90-2310.4.0.0227 - crypto: hisilicon - fix different version of devices driver compatibility issue diff --git a/patches/0020-crypto-hisilicon-fix-different-versions-of-devices-d.patch b/patches/0020-crypto-hisilicon-fix-different-versions-of-devices-d.patch index f2e799f..8518037 100644 --- a/patches/0020-crypto-hisilicon-fix-different-versions-of-devices-d.patch +++ b/patches/0020-crypto-hisilicon-fix-different-versions-of-devices-d.patch @@ -1,324 +1,324 @@ -From 8494941e651ce8968813dbd71ce55a3eb86ad7b5 Mon Sep 17 00:00:00 2001 -From: zhongkeyi -Date: Fri, 27 Oct 2023 15:11:59 +0800 -Subject: [PATCH] crypto: hisilicon - fix different versions of devices driver - compatibility issue - -driver inclusion -category: feature -bugzilla: https://gitee.com/openeuler/kernel/issues/I8BFOM -CVE: NA - ----------------------------------------------------------------------- - -In order to be compatible with devices of different versions, V1 in the -accelerator driver is now isolated, and other versions are the previous -V2 processing flow. - -Signed-off-by: zhongkeyi ---- - drivers/crypto/hisilicon/hpre/hpre_main.c | 2 +- - drivers/crypto/hisilicon/qm.c | 70 +++++++++-------------- - drivers/crypto/hisilicon/qm.h | 14 ++--- - drivers/crypto/hisilicon/rde/rde_main.c | 12 +--- - drivers/crypto/hisilicon/sec2/sec_main.c | 12 +--- - drivers/crypto/hisilicon/zip/zip_main.c | 12 +--- - 6 files changed, 37 insertions(+), 85 deletions(-) - -diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c -index cbe8ea438fd2..8c71353cd4b5 100644 ---- a/drivers/crypto/hisilicon/hpre/hpre_main.c -+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c -@@ -840,7 +840,7 @@ static int hpre_pf_probe_init(struct hisi_qm *qm) - { - int ret; - -- if (qm->ver != QM_HW_V2) -+ if (qm->ver == QM_HW_V1) - return -EINVAL; - - qm->ctrl_q_num = HPRE_QUEUE_NUM_V2; -diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c -index f2706dc0d55e..5562c63bfeeb 100644 ---- a/drivers/crypto/hisilicon/qm.c -+++ b/drivers/crypto/hisilicon/qm.c -@@ -682,7 +682,7 @@ static int qm_irq_register(struct hisi_qm *qm) - if (ret) - return ret; - -- if (qm->ver == QM_HW_V2) { -+ if (qm->ver != QM_HW_V1) { - ret = request_irq(pci_irq_vector(pdev, QM_AEQ_EVENT_IRQ_VECTOR), - qm_aeq_irq, IRQF_SHARED, qm->dev_name, qm); - if (ret) -@@ -713,13 +713,12 @@ static void qm_irq_unregister(struct hisi_qm *qm) - - free_irq(pci_irq_vector(pdev, QM_EQ_EVENT_IRQ_VECTOR), qm); - -- if (qm->ver == QM_HW_V2) { -- free_irq(pci_irq_vector(pdev, QM_AEQ_EVENT_IRQ_VECTOR), qm); -+ if (qm->ver == QM_HW_V1) -+ return; - -- if (qm->fun_type == QM_HW_PF) -- free_irq(pci_irq_vector(pdev, -- QM_ABNORMAL_EVENT_IRQ_VECTOR), qm); -- } -+ free_irq(pci_irq_vector(pdev, QM_AEQ_EVENT_IRQ_VECTOR), qm); -+ if (qm->fun_type == QM_HW_PF) -+ free_irq(pci_irq_vector(pdev, QM_ABNORMAL_EVENT_IRQ_VECTOR), qm); - } - - static void qm_init_qp_status(struct hisi_qp *qp) -@@ -741,36 +740,26 @@ static void qm_vft_data_cfg(struct hisi_qm *qm, enum vft_type type, u32 base, - if (number > 0) { - switch (type) { - case SQC_VFT: -- switch (qm->ver) { -- case QM_HW_V1: -+ if (qm->ver == QM_HW_V1) { - tmp = QM_SQC_VFT_BUF_SIZE | - QM_SQC_VFT_SQC_SIZE | - QM_SQC_VFT_INDEX_NUMBER | - QM_SQC_VFT_VALID | - (u64)base << QM_SQC_VFT_START_SQN_SHIFT; -- break; -- case QM_HW_V2: -+ } else { - tmp = (u64)base << QM_SQC_VFT_START_SQN_SHIFT | - QM_SQC_VFT_VALID | - (u64)(number - 1) << QM_SQC_VFT_SQN_SHIFT; -- break; -- case QM_HW_UNKNOWN: -- break; - } - break; - case CQC_VFT: -- switch (qm->ver) { -- case QM_HW_V1: -+ if (qm->ver == QM_HW_V1) { - tmp = QM_CQC_VFT_BUF_SIZE | - QM_CQC_VFT_SQC_SIZE | - QM_CQC_VFT_INDEX_NUMBER | - QM_CQC_VFT_VALID; -- break; -- case QM_HW_V2: -+ } else { - tmp = QM_CQC_VFT_VALID; -- break; -- case QM_HW_UNKNOWN: -- break; - } - break; - } -@@ -1827,7 +1816,7 @@ static int qm_sq_ctx_cfg(struct hisi_qp *qp, int qp_id, int pasid) - if (ver == QM_HW_V1) { - sqc->dw3 = cpu_to_le32(QM_MK_SQC_DW3_V1(0, 0, 0, qm->sqe_size)); - sqc->w8 = cpu_to_le16(QM_Q_DEPTH - 1); -- } else if (ver == QM_HW_V2) { -+ } else { - sqc->dw3 = cpu_to_le32(QM_MK_SQC_DW3_V2(qm->sqe_size)); - sqc->w8 = 0; /* rand_qc */ - } -@@ -1867,7 +1856,7 @@ static int qm_cq_ctx_cfg(struct hisi_qp *qp, int qp_id, int pasid) - cqc->dw3 = cpu_to_le32(QM_MK_CQC_DW3_V1(0, 0, 0, - QM_QC_CQE_SIZE)); - cqc->w8 = cpu_to_le16(QM_Q_DEPTH - 1); -- } else if (ver == QM_HW_V2) { -+ } else { - cqc->dw3 = cpu_to_le32(QM_MK_CQC_DW3_V2(QM_QC_CQE_SIZE)); - cqc->w8 = 0; /* rand_qc */ - } -@@ -2104,14 +2093,13 @@ static void hisi_qm_cache_wb(struct hisi_qm *qm) - { - unsigned int val; - -- if (qm->ver == QM_HW_V2) { -- writel(0x1, qm->io_base + QM_CACHE_WB_START); -- if (readl_relaxed_poll_timeout(qm->io_base + QM_CACHE_WB_DONE, -- val, val & BIT(0), POLL_PERIOD, -- POLL_TIMEOUT)) -- dev_err(&qm->pdev->dev, -- "QM writeback sqc cache fail!\n"); -- } -+ if (qm->ver == QM_HW_V1) -+ return; -+ -+ writel(0x1, qm->io_base + QM_CACHE_WB_START); -+ if (readl_relaxed_poll_timeout(qm->io_base + QM_CACHE_WB_DONE, -+ val, val & BIT(0), 10, 1000)) -+ dev_err(&qm->pdev->dev, "QM writeback sqc cache fail!\n"); - } - - int hisi_qm_get_free_qp_num(struct hisi_qm *qm) -@@ -2212,12 +2200,12 @@ static int hisi_qm_uacce_mmap(struct uacce_queue *q, - - switch (qfr->type) { - case UACCE_QFRT_MMIO: -- if (qm->ver == QM_HW_V2) { -- if (WARN_ON(sz > PAGE_SIZE * (QM_DOORBELL_PAGE_NR + -- QM_V2_DOORBELL_OFFSET / PAGE_SIZE))) -+ if (qm->ver == QM_HW_V1) { -+ if (WARN_ON(sz > PAGE_SIZE * QM_DOORBELL_PAGE_NR)) - return -EINVAL; - } else { -- if (WARN_ON(sz > PAGE_SIZE * QM_DOORBELL_PAGE_NR)) -+ if (WARN_ON(sz > PAGE_SIZE * (QM_DOORBELL_PAGE_NR + -+ QM_V2_DOORBELL_OFFSET / PAGE_SIZE))) - return -EINVAL; - } - -@@ -2691,16 +2679,10 @@ int hisi_qm_init(struct hisi_qm *qm) - struct device *dev = &pdev->dev; - int ret; - -- switch (qm->ver) { -- case QM_HW_V1: -+ if (qm->ver == QM_HW_V1) - qm->ops = &qm_hw_ops_v1; -- break; -- case QM_HW_V2: -+ else - qm->ops = &qm_hw_ops_v2; -- break; -- default: -- return -EINVAL; -- } - - if (qm->use_uacce) { - dev_info(dev, "qm register to uacce\n"); -@@ -2720,7 +2702,7 @@ int hisi_qm_init(struct hisi_qm *qm) - goto err_irq_register; - - mutex_init(&qm->mailbox_lock); -- if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V2) { -+ if (qm->fun_type == QM_HW_VF && qm->ver != QM_HW_V1) { - /* v2 or v3 starts to support get vft by mailbox */ - ret = hisi_qm_get_vft(qm, &qm->qp_base, &qm->qp_num); - if (ret) -diff --git a/drivers/crypto/hisilicon/qm.h b/drivers/crypto/hisilicon/qm.h -index d7d23d1ec34c..211689579161 100644 ---- a/drivers/crypto/hisilicon/qm.h -+++ b/drivers/crypto/hisilicon/qm.h -@@ -114,6 +114,7 @@ enum qm_hw_ver { - QM_HW_UNKNOWN = -1, - QM_HW_V1 = 0x20, - QM_HW_V2 = 0x21, -+ QM_HW_V3 = 0x30, - }; - - enum qm_fun_type { -@@ -385,7 +386,6 @@ static inline int q_num_set(const char *val, const struct kernel_param *kp, - struct pci_dev *pdev = pci_get_device(PCI_VENDOR_ID_HUAWEI, - device, NULL); - u32 n, q_num; -- u8 rev_id; - int ret; - - if (!val) -@@ -396,17 +396,10 @@ static inline int q_num_set(const char *val, const struct kernel_param *kp, - pr_info("No device found currently, suppose queue number is %d\n", - q_num); - } else { -- rev_id = pdev->revision; -- switch (rev_id) { -- case QM_HW_V1: -+ if (pdev->revision == QM_HW_V1) - q_num = QNUM_V1; -- break; -- case QM_HW_V2: -+ else - q_num = QNUM_V2; -- break; -- default: -- return -EINVAL; -- } - } - - ret = kstrtou32(val, 10, &n); -@@ -474,6 +467,7 @@ static inline int hisi_qm_pre_init(struct hisi_qm *qm, - switch (pdev->revision) { - case QM_HW_V1: - case QM_HW_V2: -+ case QM_HW_V3: - qm->ver = pdev->revision; - break; - default: -diff --git a/drivers/crypto/hisilicon/rde/rde_main.c b/drivers/crypto/hisilicon/rde/rde_main.c -index f2e00ff891db..9fee21bfaed0 100644 ---- a/drivers/crypto/hisilicon/rde/rde_main.c -+++ b/drivers/crypto/hisilicon/rde/rde_main.c -@@ -647,18 +647,10 @@ static int hisi_rde_pf_probe_init(struct hisi_qm *qm) - hisi_rde->ctrl = ctrl; - ctrl->hisi_rde = hisi_rde; - -- switch (qm->ver) { -- case QM_HW_V1: -+ if (qm->ver == QM_HW_V1) - qm->ctrl_q_num = HRDE_QUEUE_NUM_V1; -- break; -- -- case QM_HW_V2: -+ else - qm->ctrl_q_num = HRDE_QUEUE_NUM_V2; -- break; -- -- default: -- return -EINVAL; -- } - - ret = qm->err_ini.set_usr_domain_cache(qm); - if (ret) -diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c -index 0f32dcb69e12..2f8dd6c30cb1 100644 ---- a/drivers/crypto/hisilicon/sec2/sec_main.c -+++ b/drivers/crypto/hisilicon/sec2/sec_main.c -@@ -738,18 +738,10 @@ static int sec_pf_probe_init(struct hisi_qm *qm) - { - int ret; - -- switch (qm->ver) { -- case QM_HW_V1: -+ if (qm->ver == QM_HW_V1) - qm->ctrl_q_num = SEC_QUEUE_NUM_V1; -- break; -- -- case QM_HW_V2: -+ else - qm->ctrl_q_num = SEC_QUEUE_NUM_V2; -- break; -- -- default: -- return -EINVAL; -- } - - ret = qm->err_ini.set_usr_domain_cache(qm); - if (ret) -diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c -index 1ca51793e26a..ce931af1007b 100644 ---- a/drivers/crypto/hisilicon/zip/zip_main.c -+++ b/drivers/crypto/hisilicon/zip/zip_main.c -@@ -790,18 +790,10 @@ static int hisi_zip_pf_probe_init(struct hisi_qm *qm) - zip->ctrl = ctrl; - ctrl->hisi_zip = zip; - -- switch (qm->ver) { -- case QM_HW_V1: -+ if (qm->ver == QM_HW_V1) - qm->ctrl_q_num = HZIP_QUEUE_NUM_V1; -- break; -- -- case QM_HW_V2: -+ else - qm->ctrl_q_num = HZIP_QUEUE_NUM_V2; -- break; -- -- default: -- return -EINVAL; -- } - - ret = qm->err_ini.set_usr_domain_cache(qm); - if (ret) --- -2.27.0 - +From 8494941e651ce8968813dbd71ce55a3eb86ad7b5 Mon Sep 17 00:00:00 2001 +From: zhongkeyi +Date: Fri, 27 Oct 2023 15:11:59 +0800 +Subject: [PATCH] crypto: hisilicon - fix different versions of devices driver + compatibility issue + +driver inclusion +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I8BFOM +CVE: NA + +---------------------------------------------------------------------- + +In order to be compatible with devices of different versions, V1 in the +accelerator driver is now isolated, and other versions are the previous +V2 processing flow. + +Signed-off-by: zhongkeyi +--- + drivers/crypto/hisilicon/hpre/hpre_main.c | 2 +- + drivers/crypto/hisilicon/qm.c | 70 +++++++++-------------- + drivers/crypto/hisilicon/qm.h | 14 ++--- + drivers/crypto/hisilicon/rde/rde_main.c | 12 +--- + drivers/crypto/hisilicon/sec2/sec_main.c | 12 +--- + drivers/crypto/hisilicon/zip/zip_main.c | 12 +--- + 6 files changed, 37 insertions(+), 85 deletions(-) + +diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c +index cbe8ea438fd2..8c71353cd4b5 100644 +--- a/drivers/crypto/hisilicon/hpre/hpre_main.c ++++ b/drivers/crypto/hisilicon/hpre/hpre_main.c +@@ -840,7 +840,7 @@ static int hpre_pf_probe_init(struct hisi_qm *qm) + { + int ret; + +- if (qm->ver != QM_HW_V2) ++ if (qm->ver == QM_HW_V1) + return -EINVAL; + + qm->ctrl_q_num = HPRE_QUEUE_NUM_V2; +diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c +index f2706dc0d55e..5562c63bfeeb 100644 +--- a/drivers/crypto/hisilicon/qm.c ++++ b/drivers/crypto/hisilicon/qm.c +@@ -682,7 +682,7 @@ static int qm_irq_register(struct hisi_qm *qm) + if (ret) + return ret; + +- if (qm->ver == QM_HW_V2) { ++ if (qm->ver != QM_HW_V1) { + ret = request_irq(pci_irq_vector(pdev, QM_AEQ_EVENT_IRQ_VECTOR), + qm_aeq_irq, IRQF_SHARED, qm->dev_name, qm); + if (ret) +@@ -713,13 +713,12 @@ static void qm_irq_unregister(struct hisi_qm *qm) + + free_irq(pci_irq_vector(pdev, QM_EQ_EVENT_IRQ_VECTOR), qm); + +- if (qm->ver == QM_HW_V2) { +- free_irq(pci_irq_vector(pdev, QM_AEQ_EVENT_IRQ_VECTOR), qm); ++ if (qm->ver == QM_HW_V1) ++ return; + +- if (qm->fun_type == QM_HW_PF) +- free_irq(pci_irq_vector(pdev, +- QM_ABNORMAL_EVENT_IRQ_VECTOR), qm); +- } ++ free_irq(pci_irq_vector(pdev, QM_AEQ_EVENT_IRQ_VECTOR), qm); ++ if (qm->fun_type == QM_HW_PF) ++ free_irq(pci_irq_vector(pdev, QM_ABNORMAL_EVENT_IRQ_VECTOR), qm); + } + + static void qm_init_qp_status(struct hisi_qp *qp) +@@ -741,36 +740,26 @@ static void qm_vft_data_cfg(struct hisi_qm *qm, enum vft_type type, u32 base, + if (number > 0) { + switch (type) { + case SQC_VFT: +- switch (qm->ver) { +- case QM_HW_V1: ++ if (qm->ver == QM_HW_V1) { + tmp = QM_SQC_VFT_BUF_SIZE | + QM_SQC_VFT_SQC_SIZE | + QM_SQC_VFT_INDEX_NUMBER | + QM_SQC_VFT_VALID | + (u64)base << QM_SQC_VFT_START_SQN_SHIFT; +- break; +- case QM_HW_V2: ++ } else { + tmp = (u64)base << QM_SQC_VFT_START_SQN_SHIFT | + QM_SQC_VFT_VALID | + (u64)(number - 1) << QM_SQC_VFT_SQN_SHIFT; +- break; +- case QM_HW_UNKNOWN: +- break; + } + break; + case CQC_VFT: +- switch (qm->ver) { +- case QM_HW_V1: ++ if (qm->ver == QM_HW_V1) { + tmp = QM_CQC_VFT_BUF_SIZE | + QM_CQC_VFT_SQC_SIZE | + QM_CQC_VFT_INDEX_NUMBER | + QM_CQC_VFT_VALID; +- break; +- case QM_HW_V2: ++ } else { + tmp = QM_CQC_VFT_VALID; +- break; +- case QM_HW_UNKNOWN: +- break; + } + break; + } +@@ -1827,7 +1816,7 @@ static int qm_sq_ctx_cfg(struct hisi_qp *qp, int qp_id, int pasid) + if (ver == QM_HW_V1) { + sqc->dw3 = cpu_to_le32(QM_MK_SQC_DW3_V1(0, 0, 0, qm->sqe_size)); + sqc->w8 = cpu_to_le16(QM_Q_DEPTH - 1); +- } else if (ver == QM_HW_V2) { ++ } else { + sqc->dw3 = cpu_to_le32(QM_MK_SQC_DW3_V2(qm->sqe_size)); + sqc->w8 = 0; /* rand_qc */ + } +@@ -1867,7 +1856,7 @@ static int qm_cq_ctx_cfg(struct hisi_qp *qp, int qp_id, int pasid) + cqc->dw3 = cpu_to_le32(QM_MK_CQC_DW3_V1(0, 0, 0, + QM_QC_CQE_SIZE)); + cqc->w8 = cpu_to_le16(QM_Q_DEPTH - 1); +- } else if (ver == QM_HW_V2) { ++ } else { + cqc->dw3 = cpu_to_le32(QM_MK_CQC_DW3_V2(QM_QC_CQE_SIZE)); + cqc->w8 = 0; /* rand_qc */ + } +@@ -2104,14 +2093,13 @@ static void hisi_qm_cache_wb(struct hisi_qm *qm) + { + unsigned int val; + +- if (qm->ver == QM_HW_V2) { +- writel(0x1, qm->io_base + QM_CACHE_WB_START); +- if (readl_relaxed_poll_timeout(qm->io_base + QM_CACHE_WB_DONE, +- val, val & BIT(0), POLL_PERIOD, +- POLL_TIMEOUT)) +- dev_err(&qm->pdev->dev, +- "QM writeback sqc cache fail!\n"); +- } ++ if (qm->ver == QM_HW_V1) ++ return; ++ ++ writel(0x1, qm->io_base + QM_CACHE_WB_START); ++ if (readl_relaxed_poll_timeout(qm->io_base + QM_CACHE_WB_DONE, ++ val, val & BIT(0), 10, 1000)) ++ dev_err(&qm->pdev->dev, "QM writeback sqc cache fail!\n"); + } + + int hisi_qm_get_free_qp_num(struct hisi_qm *qm) +@@ -2212,12 +2200,12 @@ static int hisi_qm_uacce_mmap(struct uacce_queue *q, + + switch (qfr->type) { + case UACCE_QFRT_MMIO: +- if (qm->ver == QM_HW_V2) { +- if (WARN_ON(sz > PAGE_SIZE * (QM_DOORBELL_PAGE_NR + +- QM_V2_DOORBELL_OFFSET / PAGE_SIZE))) ++ if (qm->ver == QM_HW_V1) { ++ if (WARN_ON(sz > PAGE_SIZE * QM_DOORBELL_PAGE_NR)) + return -EINVAL; + } else { +- if (WARN_ON(sz > PAGE_SIZE * QM_DOORBELL_PAGE_NR)) ++ if (WARN_ON(sz > PAGE_SIZE * (QM_DOORBELL_PAGE_NR + ++ QM_V2_DOORBELL_OFFSET / PAGE_SIZE))) + return -EINVAL; + } + +@@ -2691,16 +2679,10 @@ int hisi_qm_init(struct hisi_qm *qm) + struct device *dev = &pdev->dev; + int ret; + +- switch (qm->ver) { +- case QM_HW_V1: ++ if (qm->ver == QM_HW_V1) + qm->ops = &qm_hw_ops_v1; +- break; +- case QM_HW_V2: ++ else + qm->ops = &qm_hw_ops_v2; +- break; +- default: +- return -EINVAL; +- } + + if (qm->use_uacce) { + dev_info(dev, "qm register to uacce\n"); +@@ -2720,7 +2702,7 @@ int hisi_qm_init(struct hisi_qm *qm) + goto err_irq_register; + + mutex_init(&qm->mailbox_lock); +- if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V2) { ++ if (qm->fun_type == QM_HW_VF && qm->ver != QM_HW_V1) { + /* v2 or v3 starts to support get vft by mailbox */ + ret = hisi_qm_get_vft(qm, &qm->qp_base, &qm->qp_num); + if (ret) +diff --git a/drivers/crypto/hisilicon/qm.h b/drivers/crypto/hisilicon/qm.h +index d7d23d1ec34c..211689579161 100644 +--- a/drivers/crypto/hisilicon/qm.h ++++ b/drivers/crypto/hisilicon/qm.h +@@ -114,6 +114,7 @@ enum qm_hw_ver { + QM_HW_UNKNOWN = -1, + QM_HW_V1 = 0x20, + QM_HW_V2 = 0x21, ++ QM_HW_V3 = 0x30, + }; + + enum qm_fun_type { +@@ -385,7 +386,6 @@ static inline int q_num_set(const char *val, const struct kernel_param *kp, + struct pci_dev *pdev = pci_get_device(PCI_VENDOR_ID_HUAWEI, + device, NULL); + u32 n, q_num; +- u8 rev_id; + int ret; + + if (!val) +@@ -396,17 +396,10 @@ static inline int q_num_set(const char *val, const struct kernel_param *kp, + pr_info("No device found currently, suppose queue number is %d\n", + q_num); + } else { +- rev_id = pdev->revision; +- switch (rev_id) { +- case QM_HW_V1: ++ if (pdev->revision == QM_HW_V1) + q_num = QNUM_V1; +- break; +- case QM_HW_V2: ++ else + q_num = QNUM_V2; +- break; +- default: +- return -EINVAL; +- } + } + + ret = kstrtou32(val, 10, &n); +@@ -474,6 +467,7 @@ static inline int hisi_qm_pre_init(struct hisi_qm *qm, + switch (pdev->revision) { + case QM_HW_V1: + case QM_HW_V2: ++ case QM_HW_V3: + qm->ver = pdev->revision; + break; + default: +diff --git a/drivers/crypto/hisilicon/rde/rde_main.c b/drivers/crypto/hisilicon/rde/rde_main.c +index f2e00ff891db..9fee21bfaed0 100644 +--- a/drivers/crypto/hisilicon/rde/rde_main.c ++++ b/drivers/crypto/hisilicon/rde/rde_main.c +@@ -647,18 +647,10 @@ static int hisi_rde_pf_probe_init(struct hisi_qm *qm) + hisi_rde->ctrl = ctrl; + ctrl->hisi_rde = hisi_rde; + +- switch (qm->ver) { +- case QM_HW_V1: ++ if (qm->ver == QM_HW_V1) + qm->ctrl_q_num = HRDE_QUEUE_NUM_V1; +- break; +- +- case QM_HW_V2: ++ else + qm->ctrl_q_num = HRDE_QUEUE_NUM_V2; +- break; +- +- default: +- return -EINVAL; +- } + + ret = qm->err_ini.set_usr_domain_cache(qm); + if (ret) +diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c +index 0f32dcb69e12..2f8dd6c30cb1 100644 +--- a/drivers/crypto/hisilicon/sec2/sec_main.c ++++ b/drivers/crypto/hisilicon/sec2/sec_main.c +@@ -738,18 +738,10 @@ static int sec_pf_probe_init(struct hisi_qm *qm) + { + int ret; + +- switch (qm->ver) { +- case QM_HW_V1: ++ if (qm->ver == QM_HW_V1) + qm->ctrl_q_num = SEC_QUEUE_NUM_V1; +- break; +- +- case QM_HW_V2: ++ else + qm->ctrl_q_num = SEC_QUEUE_NUM_V2; +- break; +- +- default: +- return -EINVAL; +- } + + ret = qm->err_ini.set_usr_domain_cache(qm); + if (ret) +diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c +index 1ca51793e26a..ce931af1007b 100644 +--- a/drivers/crypto/hisilicon/zip/zip_main.c ++++ b/drivers/crypto/hisilicon/zip/zip_main.c +@@ -790,18 +790,10 @@ static int hisi_zip_pf_probe_init(struct hisi_qm *qm) + zip->ctrl = ctrl; + ctrl->hisi_zip = zip; + +- switch (qm->ver) { +- case QM_HW_V1: ++ if (qm->ver == QM_HW_V1) + qm->ctrl_q_num = HZIP_QUEUE_NUM_V1; +- break; +- +- case QM_HW_V2: ++ else + qm->ctrl_q_num = HZIP_QUEUE_NUM_V2; +- break; +- +- default: +- return -EINVAL; +- } + + ret = qm->err_ini.set_usr_domain_cache(qm); + if (ret) +-- +2.27.0 + diff --git a/patches/0021-perf-arm-spe-Include-bitops.h-for-BIT-macro.patch b/patches/0021-perf-arm-spe-Include-bitops.h-for-BIT-macro.patch new file mode 100644 index 0000000..5043780 --- /dev/null +++ b/patches/0021-perf-arm-spe-Include-bitops.h-for-BIT-macro.patch @@ -0,0 +1,86 @@ +From a7e133186aa078eb9450e47121f5d26a4330f83c Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:31:57 +0800 +Subject: [PATCH 01/21] perf arm-spe: Include bitops.h for BIT() macro + +mainline inclusion +from mainline-v5.11-rc1 +commit c185f1cde46653cd0a7a1eaf461d16c462870781 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +Include header linux/bitops.h, directly use its BIT() macro and remove +the self defined macros. + +Committer notes: + +Use BIT_ULL() instead of BIT to build on 32-bit arches as mentioned in +review by Andre Przywara . I noticed the build +failure when crossbuilding to arm32 from x86_64. + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Link: https://lore.kernel.org/r/20201111071149.815-2-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan + +Conflicts: + tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +--- + tools/perf/util/arm-spe-decoder/arm-spe-decoder.c | 5 +---- + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 7 +++---- + 2 files changed, 4 insertions(+), 8 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +index 322961c863f0..3993c1524c73 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +@@ -7,6 +7,7 @@ + #include + #include + #include ++#include + #include + + #include "cache.h" +@@ -16,10 +17,6 @@ + #include "arm-spe-pkt-decoder.h" + #include "arm-spe-decoder.h" + +-#ifndef BIT +-#define BIT(n) (1UL << (n)) +-#endif +- + struct arm_spe_decoder { + int (*get_trace)(struct arm_spe_buffer *buffer, void *data); + void *data; +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index b94001b756c7..5f65a3a70c57 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -8,13 +8,12 @@ + #include + #include + #include ++#include + + #include "arm-spe-pkt-decoder.h" + +-#define BIT(n) (1ULL << (n)) +- +-#define NS_FLAG BIT(63) +-#define EL_FLAG (BIT(62) | BIT(61)) ++#define NS_FLAG BIT_ULL(63) ++#define EL_FLAG (BIT_ULL(62) | BIT_ULL(61)) + + #define SPE_HEADER0_PAD 0x0 + #define SPE_HEADER0_END 0x1 +-- +2.27.0 + diff --git a/patches/0022-perf-arm-spe-Fix-a-typo-in-comment.patch b/patches/0022-perf-arm-spe-Fix-a-typo-in-comment.patch new file mode 100644 index 0000000..75e18ae --- /dev/null +++ b/patches/0022-perf-arm-spe-Fix-a-typo-in-comment.patch @@ -0,0 +1,44 @@ +From 396666c4672c0ac44f4ce0e16f2f7ef33291c4f4 Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:31:58 +0800 +Subject: [PATCH 02/21] perf arm-spe: Fix a typo in comment + +mainline inclusion +from mainline-v5.11-rc1 +commit 903b659436b706928934ff5ef59d591267e5ce1a +category: bugfix +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +Fix a typo: s/iff/if. + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Link: https://lore.kernel.org/r/20201111071149.815-3-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 5f65a3a70c57..12a96585da94 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -142,7 +142,7 @@ static int arm_spe_get_events(const unsigned char *buf, size_t len, + + /* we use index to identify Events with a less number of + * comparisons in arm_spe_pkt_desc(): E.g., the LLC-ACCESS, +- * LLC-REFILL, and REMOTE-ACCESS events are identified iff ++ * LLC-REFILL, and REMOTE-ACCESS events are identified if + * index > 1. + */ + packet->index = ret - 1; +-- +2.27.0 + diff --git a/patches/0023-perf-arm-spe-Refactor-payload-size-calculation.patch b/patches/0023-perf-arm-spe-Refactor-payload-size-calculation.patch new file mode 100644 index 0000000..6f6a994 --- /dev/null +++ b/patches/0023-perf-arm-spe-Refactor-payload-size-calculation.patch @@ -0,0 +1,84 @@ +From 8563343c538c17d40bcfabd329cf8de1d722c1ca Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:31:59 +0800 +Subject: [PATCH 03/21] perf arm-spe: Refactor payload size calculation + +mainline inclusion +from mainline-v5.11-rc1 +commit b2ded2e2e2764e502fc025f615210434f1eaa2a9 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +This patch defines macro to extract "sz" field from header, and renames +the function payloadlen() to arm_spe_payload_len(). + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Link: https://lore.kernel.org/r/20201111071149.815-4-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + tools/include/linux/bits.h | 4 ++++ + .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 18 +++++++++--------- + 2 files changed, 13 insertions(+), 9 deletions(-) + +diff --git a/tools/include/linux/bits.h b/tools/include/linux/bits.h +index 2b7b532c1d51..0d431f8e70cf 100644 +--- a/tools/include/linux/bits.h ++++ b/tools/include/linux/bits.h +@@ -3,6 +3,10 @@ + #define __LINUX_BITS_H + #include + ++#ifndef BITS_PER_LONG_LONG ++#define BITS_PER_LONG_LONG 64 ++#endif ++ + #define BIT(nr) (1UL << (nr)) + #define BIT_ULL(nr) (1ULL << (nr)) + #define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 12a96585da94..a8eb7be189ec 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -69,22 +69,22 @@ const char *arm_spe_pkt_name(enum arm_spe_pkt_type type) + return arm_spe_packet_name[type]; + } + +-/* return ARM SPE payload size from its encoding, +- * which is in bits 5:4 of the byte. +- * 00 : byte +- * 01 : halfword (2) +- * 10 : word (4) +- * 11 : doubleword (8) ++/* ++ * Extracts the field "sz" from header bits and converts to bytes: ++ * 00 : byte (1) ++ * 01 : halfword (2) ++ * 10 : word (4) ++ * 11 : doubleword (8) + */ +-static int payloadlen(unsigned char byte) ++static unsigned int arm_spe_payload_len(unsigned char hdr) + { +- return 1 << ((byte & 0x30) >> 4); ++ return 1U << ((hdr & GENMASK_ULL(5, 4)) >> 4); + } + + static int arm_spe_get_payload(const unsigned char *buf, size_t len, + struct arm_spe_pkt *packet) + { +- size_t payload_len = payloadlen(buf[0]); ++ size_t payload_len = arm_spe_payload_len(buf[0]); + + if (len < 1 + payload_len) + return ARM_SPE_NEED_MORE_BYTES; +-- +2.27.0 + diff --git a/patches/0024-perf-arm-spe-Refactor-arm_spe_get_events.patch b/patches/0024-perf-arm-spe-Refactor-arm_spe_get_events.patch new file mode 100644 index 0000000..f89b0ca --- /dev/null +++ b/patches/0024-perf-arm-spe-Refactor-arm_spe_get_events.patch @@ -0,0 +1,70 @@ +From 3c5dcbec06d52582a33bd142000fe41581d79d04 Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:00 +0800 +Subject: [PATCH 04/21] perf arm-spe: Refactor arm_spe_get_events() + +mainline inclusion +from mainline-v5.11-rc1 +commit b65577baf482909225c79d8a6bad44d2a62751f4 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +In function arm_spe_get_events(), the event packet's 'index' is assigned +as payload length, but the flow is not directive: it firstly gets the +packet length from the return value of arm_spe_get_payload(), the value +includes header length (1) and payload length: + + int ret = arm_spe_get_payload(buf, len, packet); + +and then reduces header length from packet length, so finally get the +payload length: + + packet->index = ret - 1; + +To simplify the code, this patch directly assigns payload length to +event packet's index; and at the end it calls arm_spe_get_payload() to +return the payload value. + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Link: https://lore.kernel.org/r/20201111071149.815-5-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index a8eb7be189ec..57904da89db1 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -136,8 +136,6 @@ static int arm_spe_get_timestamp(const unsigned char *buf, size_t len, + static int arm_spe_get_events(const unsigned char *buf, size_t len, + struct arm_spe_pkt *packet) + { +- int ret = arm_spe_get_payload(buf, len, packet); +- + packet->type = ARM_SPE_EVENTS; + + /* we use index to identify Events with a less number of +@@ -145,9 +143,9 @@ static int arm_spe_get_events(const unsigned char *buf, size_t len, + * LLC-REFILL, and REMOTE-ACCESS events are identified if + * index > 1. + */ +- packet->index = ret - 1; ++ packet->index = arm_spe_payload_len(buf[0]); + +- return ret; ++ return arm_spe_get_payload(buf, len, packet); + } + + static int arm_spe_get_data_source(const unsigned char *buf, size_t len, +-- +2.27.0 + diff --git a/patches/0025-perf-arm-spe-Fix-packet-length-handling.patch b/patches/0025-perf-arm-spe-Fix-packet-length-handling.patch new file mode 100644 index 0000000..4295220 --- /dev/null +++ b/patches/0025-perf-arm-spe-Fix-packet-length-handling.patch @@ -0,0 +1,157 @@ +From e7588e8a33a8f5eec2a013c1e0279a894df725cd Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:01 +0800 +Subject: [PATCH 05/21] perf arm-spe: Fix packet length handling + +mainline inclusion +from mainline-v5.11-rc1 +commit 0a04244cabc5560ce1e08555e8712a4cd20ab6ce +category: bugfix +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +When processing address packet and counter packet, if the packet +contains extended header, it misses to account the extra one byte for +header length calculation, thus returns the wrong packet length. + +To correct the packet length calculation, one possible fixing is simply +to plus extra 1 for extended header, but will spread some duplicate code +in the flows for processing address packet and counter packet. +Alternatively, we can refine the function arm_spe_get_payload() to not +only support short header and allow it to support extended header, and +rely on it for the packet length calculation. + +So this patch refactors function arm_spe_get_payload() with a new +argument 'ext_hdr' for support extended header; the packet processing +flows can invoke this function to unify the packet length calculation. + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Link: https://lore.kernel.org/r/20201111071149.815-6-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + .../arm-spe-decoder/arm-spe-pkt-decoder.c | 34 +++++++------------ + 1 file changed, 12 insertions(+), 22 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 57904da89db1..671a4763fb47 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -82,14 +82,15 @@ static unsigned int arm_spe_payload_len(unsigned char hdr) + } + + static int arm_spe_get_payload(const unsigned char *buf, size_t len, ++ unsigned char ext_hdr, + struct arm_spe_pkt *packet) + { +- size_t payload_len = arm_spe_payload_len(buf[0]); ++ size_t payload_len = arm_spe_payload_len(buf[ext_hdr]); + +- if (len < 1 + payload_len) ++ if (len < 1 + ext_hdr + payload_len) + return ARM_SPE_NEED_MORE_BYTES; + +- buf++; ++ buf += 1 + ext_hdr; + + switch (payload_len) { + case 1: packet->payload = *(uint8_t *)buf; break; +@@ -99,7 +100,7 @@ static int arm_spe_get_payload(const unsigned char *buf, size_t len, + default: return ARM_SPE_BAD_PACKET; + } + +- return 1 + payload_len; ++ return 1 + ext_hdr + payload_len; + } + + static int arm_spe_get_pad(struct arm_spe_pkt *packet) +@@ -130,7 +131,7 @@ static int arm_spe_get_timestamp(const unsigned char *buf, size_t len, + struct arm_spe_pkt *packet) + { + packet->type = ARM_SPE_TIMESTAMP; +- return arm_spe_get_payload(buf, len, packet); ++ return arm_spe_get_payload(buf, len, 0, packet); + } + + static int arm_spe_get_events(const unsigned char *buf, size_t len, +@@ -145,14 +146,14 @@ static int arm_spe_get_events(const unsigned char *buf, size_t len, + */ + packet->index = arm_spe_payload_len(buf[0]); + +- return arm_spe_get_payload(buf, len, packet); ++ return arm_spe_get_payload(buf, len, 0, packet); + } + + static int arm_spe_get_data_source(const unsigned char *buf, size_t len, + struct arm_spe_pkt *packet) + { + packet->type = ARM_SPE_DATA_SOURCE; +- return arm_spe_get_payload(buf, len, packet); ++ return arm_spe_get_payload(buf, len, 0, packet); + } + + static int arm_spe_get_context(const unsigned char *buf, size_t len, +@@ -160,8 +161,7 @@ static int arm_spe_get_context(const unsigned char *buf, size_t len, + { + packet->type = ARM_SPE_CONTEXT; + packet->index = buf[0] & 0x3; +- +- return arm_spe_get_payload(buf, len, packet); ++ return arm_spe_get_payload(buf, len, 0, packet); + } + + static int arm_spe_get_op_type(const unsigned char *buf, size_t len, +@@ -169,41 +169,31 @@ static int arm_spe_get_op_type(const unsigned char *buf, size_t len, + { + packet->type = ARM_SPE_OP_TYPE; + packet->index = buf[0] & 0x3; +- return arm_spe_get_payload(buf, len, packet); ++ return arm_spe_get_payload(buf, len, 0, packet); + } + + static int arm_spe_get_counter(const unsigned char *buf, size_t len, + const unsigned char ext_hdr, struct arm_spe_pkt *packet) + { +- if (len < 2) +- return ARM_SPE_NEED_MORE_BYTES; +- + packet->type = ARM_SPE_COUNTER; + if (ext_hdr) + packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7); + else + packet->index = buf[0] & 0x7; + +- packet->payload = le16_to_cpu(*(uint16_t *)(buf + 1)); +- +- return 1 + ext_hdr + 2; ++ return arm_spe_get_payload(buf, len, ext_hdr, packet); + } + + static int arm_spe_get_addr(const unsigned char *buf, size_t len, + const unsigned char ext_hdr, struct arm_spe_pkt *packet) + { +- if (len < 8) +- return ARM_SPE_NEED_MORE_BYTES; +- + packet->type = ARM_SPE_ADDRESS; + if (ext_hdr) + packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7); + else + packet->index = buf[0] & 0x7; + +- memcpy_le64(&packet->payload, buf + 1, 8); +- +- return 1 + ext_hdr + 8; ++ return arm_spe_get_payload(buf, len, ext_hdr, packet); + } + + static int arm_spe_do_get_packet(const unsigned char *buf, size_t len, +-- +2.27.0 + diff --git a/patches/0026-perf-arm-spe-Refactor-printing-string-to-buffer.patch b/patches/0026-perf-arm-spe-Refactor-printing-string-to-buffer.patch new file mode 100644 index 0000000..94d05f2 --- /dev/null +++ b/patches/0026-perf-arm-spe-Refactor-printing-string-to-buffer.patch @@ -0,0 +1,439 @@ +From bff3118d92bfd22952f81e9772e6472f8efcb6ed Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:02 +0800 +Subject: [PATCH 06/21] perf arm-spe: Refactor printing string to buffer + +mainline inclusion +from mainline-v5.11-rc1 +commit 75eeaddd57f4a0ac89110547221df8f3757d5a6f +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +When outputs strings to the decoding buffer with function snprintf(), +SPE decoder needs to detects if any error returns from snprintf() and if +so needs to directly bail out. If snprintf() returns success, it needs +to update buffer pointer and reduce the buffer length so can continue to +output the next string into the consequent memory space. + +This complex logics are spreading in the function arm_spe_pkt_desc() so +there has many duplicate codes for handling error detecting, increment +buffer pointer and decrement buffer size. + +To avoid the duplicate code, this patch introduces a new helper function +arm_spe_pkt_out_string() which is used to wrap up the complex logics, +and it's used by the caller arm_spe_pkt_desc(). This patch moves the +variable 'blen' as the function's local variable so allows to remove +the unnecessary braces and improve the readability. + +This patch simplifies the return value for arm_spe_pkt_desc(): '0' means +success and other values mean an error has occurred. To realize this, +it relies on arm_spe_pkt_out_string()'s parameter 'err', the 'err' is a +cumulative value, returns its final value if printing buffer is called +for one time or multiple times. Finally, the error is handled in a +central place, rather than directly bailing out in switch-cases, it +returns error at the end of arm_spe_pkt_desc(). + +This patch changes the caller arm_spe_dump() to respect the updated +return value semantics of arm_spe_pkt_desc(). + +Suggested-by: Dave Martin +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Reviewed-by: Dave Martin +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-2-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + .../arm-spe-decoder/arm-spe-pkt-decoder.c | 302 +++++++++--------- + tools/perf/util/arm-spe.c | 2 +- + 2 files changed, 151 insertions(+), 153 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 671a4763fb47..fbededc1bcd4 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + + #include "arm-spe-pkt-decoder.h" + +@@ -258,192 +259,189 @@ int arm_spe_get_packet(const unsigned char *buf, size_t len, + return ret; + } + ++static int arm_spe_pkt_out_string(int *err, char **buf_p, size_t *blen, ++ const char *fmt, ...) ++{ ++ va_list ap; ++ int ret; ++ ++ /* Bail out if any error occurred */ ++ if (err && *err) ++ return *err; ++ ++ va_start(ap, fmt); ++ ret = vsnprintf(*buf_p, *blen, fmt, ap); ++ va_end(ap); ++ ++ if (ret < 0) { ++ if (err && !*err) ++ *err = ret; ++ ++ /* ++ * A return value of *blen or more means that the output was ++ * truncated and the buffer is overrun. ++ */ ++ } else if ((size_t)ret >= *blen) { ++ (*buf_p)[*blen - 1] = '\0'; ++ ++ /* ++ * Set *err to 'ret' to avoid overflow if tries to ++ * fill this buffer sequentially. ++ */ ++ if (err && !*err) ++ *err = ret; ++ } else { ++ *buf_p += ret; ++ *blen -= ret; ++ } ++ ++ return ret; ++} ++ + int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, + size_t buf_len) + { +- int ret, ns, el, idx = packet->index; ++ int ns, el, idx = packet->index; + unsigned long long payload = packet->payload; + const char *name = arm_spe_pkt_name(packet->type); ++ char *buf_orig = buf; ++ size_t blen = buf_len; ++ int err = 0; + + switch (packet->type) { + case ARM_SPE_BAD: + case ARM_SPE_PAD: + case ARM_SPE_END: +- return snprintf(buf, buf_len, "%s", name); +- case ARM_SPE_EVENTS: { +- size_t blen = buf_len; +- +- ret = 0; +- ret = snprintf(buf, buf_len, "EV"); +- buf += ret; +- blen -= ret; +- if (payload & 0x1) { +- ret = snprintf(buf, buf_len, " EXCEPTION-GEN"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x2) { +- ret = snprintf(buf, buf_len, " RETIRED"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x4) { +- ret = snprintf(buf, buf_len, " L1D-ACCESS"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x8) { +- ret = snprintf(buf, buf_len, " L1D-REFILL"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x10) { +- ret = snprintf(buf, buf_len, " TLB-ACCESS"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x20) { +- ret = snprintf(buf, buf_len, " TLB-REFILL"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x40) { +- ret = snprintf(buf, buf_len, " NOT-TAKEN"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x80) { +- ret = snprintf(buf, buf_len, " MISPRED"); +- buf += ret; +- blen -= ret; +- } ++ arm_spe_pkt_out_string(&err, &buf, &blen, "%s", name); ++ break; ++ case ARM_SPE_EVENTS: ++ arm_spe_pkt_out_string(&err, &buf, &blen, "EV"); ++ ++ if (payload & 0x1) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " EXCEPTION-GEN"); ++ if (payload & 0x2) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " RETIRED"); ++ if (payload & 0x4) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " L1D-ACCESS"); ++ if (payload & 0x8) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " L1D-REFILL"); ++ if (payload & 0x10) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " TLB-ACCESS"); ++ if (payload & 0x20) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " TLB-REFILL"); ++ if (payload & 0x40) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " NOT-TAKEN"); ++ if (payload & 0x80) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " MISPRED"); + if (idx > 1) { +- if (payload & 0x100) { +- ret = snprintf(buf, buf_len, " LLC-ACCESS"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x200) { +- ret = snprintf(buf, buf_len, " LLC-REFILL"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x400) { +- ret = snprintf(buf, buf_len, " REMOTE-ACCESS"); +- buf += ret; +- blen -= ret; +- } ++ if (payload & 0x100) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " LLC-ACCESS"); ++ if (payload & 0x200) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " LLC-REFILL"); ++ if (payload & 0x400) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " REMOTE-ACCESS"); + } +- if (ret < 0) +- return ret; +- blen -= ret; +- return buf_len - blen; +- } ++ break; + case ARM_SPE_OP_TYPE: + switch (idx) { +- case 0: return snprintf(buf, buf_len, "%s", payload & 0x1 ? +- "COND-SELECT" : "INSN-OTHER"); +- case 1: { +- size_t blen = buf_len; ++ case 0: ++ arm_spe_pkt_out_string(&err, &buf, &blen, ++ payload & 0x1 ? "COND-SELECT" : "INSN-OTHER"); ++ break; ++ case 1: ++ arm_spe_pkt_out_string(&err, &buf, &blen, ++ payload & 0x1 ? "ST" : "LD"); + +- if (payload & 0x1) +- ret = snprintf(buf, buf_len, "ST"); +- else +- ret = snprintf(buf, buf_len, "LD"); +- buf += ret; +- blen -= ret; + if (payload & 0x2) { +- if (payload & 0x4) { +- ret = snprintf(buf, buf_len, " AT"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x8) { +- ret = snprintf(buf, buf_len, " EXCL"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x10) { +- ret = snprintf(buf, buf_len, " AR"); +- buf += ret; +- blen -= ret; +- } ++ if (payload & 0x4) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " AT"); ++ if (payload & 0x8) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " EXCL"); ++ if (payload & 0x10) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " AR"); + } else if (payload & 0x4) { +- ret = snprintf(buf, buf_len, " SIMD-FP"); +- buf += ret; +- blen -= ret; +- } +- if (ret < 0) +- return ret; +- blen -= ret; +- return buf_len - blen; +- } +- case 2: { +- size_t blen = buf_len; +- +- ret = snprintf(buf, buf_len, "B"); +- buf += ret; +- blen -= ret; +- if (payload & 0x1) { +- ret = snprintf(buf, buf_len, " COND"); +- buf += ret; +- blen -= ret; +- } +- if (payload & 0x2) { +- ret = snprintf(buf, buf_len, " IND"); +- buf += ret; +- blen -= ret; +- } +- if (ret < 0) +- return ret; +- blen -= ret; +- return buf_len - blen; ++ arm_spe_pkt_out_string(&err, &buf, &blen, " SIMD-FP"); + } +- default: return 0; ++ break; ++ case 2: ++ arm_spe_pkt_out_string(&err, &buf, &blen, "B"); ++ ++ if (payload & 0x1) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " COND"); ++ if (payload & 0x2) ++ arm_spe_pkt_out_string(&err, &buf, &blen, " IND"); ++ ++ break; ++ default: ++ /* Unknown index */ ++ err = -1; ++ break; + } ++ break; + case ARM_SPE_DATA_SOURCE: + case ARM_SPE_TIMESTAMP: +- return snprintf(buf, buf_len, "%s %lld", name, payload); ++ arm_spe_pkt_out_string(&err, &buf, &blen, "%s %lld", name, payload); ++ break; + case ARM_SPE_ADDRESS: + switch (idx) { + case 0: +- case 1: ns = !!(packet->payload & NS_FLAG); ++ case 1: ++ ns = !!(packet->payload & NS_FLAG); + el = (packet->payload & EL_FLAG) >> 61; + payload &= ~(0xffULL << 56); +- return snprintf(buf, buf_len, "%s 0x%llx el%d ns=%d", ++ arm_spe_pkt_out_string(&err, &buf, &blen, ++ "%s 0x%llx el%d ns=%d", + (idx == 1) ? "TGT" : "PC", payload, el, ns); +- case 2: return snprintf(buf, buf_len, "VA 0x%llx", payload); +- case 3: ns = !!(packet->payload & NS_FLAG); ++ break; ++ case 2: ++ arm_spe_pkt_out_string(&err, &buf, &blen, ++ "VA 0x%llx", payload); ++ break; ++ case 3: ++ ns = !!(packet->payload & NS_FLAG); + payload &= ~(0xffULL << 56); +- return snprintf(buf, buf_len, "PA 0x%llx ns=%d", +- payload, ns); +- default: return 0; ++ arm_spe_pkt_out_string(&err, &buf, &blen, ++ "PA 0x%llx ns=%d", payload, ns); ++ break; ++ default: ++ /* Unknown index */ ++ err = -1; ++ break; + } ++ break; + case ARM_SPE_CONTEXT: +- return snprintf(buf, buf_len, "%s 0x%lx el%d", name, +- (unsigned long)payload, idx + 1); +- case ARM_SPE_COUNTER: { +- size_t blen = buf_len; +- +- ret = snprintf(buf, buf_len, "%s %d ", name, +- (unsigned short)payload); +- buf += ret; +- blen -= ret; ++ arm_spe_pkt_out_string(&err, &buf, &blen, "%s 0x%lx el%d", ++ name, (unsigned long)payload, idx + 1); ++ break; ++ case ARM_SPE_COUNTER: ++ arm_spe_pkt_out_string(&err, &buf, &blen, "%s %d ", name, ++ (unsigned short)payload); + switch (idx) { +- case 0: ret = snprintf(buf, buf_len, "TOT"); break; +- case 1: ret = snprintf(buf, buf_len, "ISSUE"); break; +- case 2: ret = snprintf(buf, buf_len, "XLAT"); break; +- default: ret = 0; ++ case 0: ++ arm_spe_pkt_out_string(&err, &buf, &blen, "TOT"); ++ break; ++ case 1: ++ arm_spe_pkt_out_string(&err, &buf, &blen, "ISSUE"); ++ break; ++ case 2: ++ arm_spe_pkt_out_string(&err, &buf, &blen, "XLAT"); ++ break; ++ default: ++ break; + } +- if (ret < 0) +- return ret; +- blen -= ret; +- return buf_len - blen; +- } ++ break; + default: ++ /* Unknown packet type */ ++ err = -1; + break; + } + +- return snprintf(buf, buf_len, "%s 0x%llx (%d)", +- name, payload, packet->index); ++ /* Output raw data if detect any error */ ++ if (err) { ++ err = 0; ++ arm_spe_pkt_out_string(&err, &buf_orig, &buf_len, "%s 0x%llx (%d)", ++ name, payload, packet->index); ++ } ++ ++ return err; + } +diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c +index 1f97e432d125..81b3a12ed176 100644 +--- a/tools/perf/util/arm-spe.c ++++ b/tools/perf/util/arm-spe.c +@@ -161,7 +161,7 @@ static void arm_spe_dump(struct arm_spe *spe __maybe_unused, + if (ret > 0) { + ret = arm_spe_pkt_desc(&packet, desc, + ARM_SPE_PKT_DESC_MAX); +- if (ret > 0) ++ if (!ret) + color_fprintf(stdout, color, " %s\n", desc); + } else { + color_fprintf(stdout, color, " Bad packet!\n"); +-- +2.27.0 + diff --git a/patches/0027-perf-arm-spe-Refactor-packet-header-parsing.patch b/patches/0027-perf-arm-spe-Refactor-packet-header-parsing.patch new file mode 100644 index 0000000..75a4634 --- /dev/null +++ b/patches/0027-perf-arm-spe-Refactor-packet-header-parsing.patch @@ -0,0 +1,210 @@ +From 38d291dbe53affcb0828c5a851cbb80e68d0ba9a Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:03 +0800 +Subject: [PATCH 07/21] perf arm-spe: Refactor packet header parsing + +mainline inclusion +from mainline-v5.11-rc1 +commit 11695142e25e957dc3e56c29dc5f9daaf9530b10 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +The packet header parsing uses the hard coded values and it uses nested +if-else statements. + +To improve the readability, this patch refactors the macros for packet +header format so it removes the hard coded values. Furthermore, based +on the new mask macros it reduces the nested if-else statements and +changes to use the flat conditions checking, this is directive and can +easily map to the descriptions in ARMv8-a architecture reference manual +(ARM DDI 0487E.a), chapter 'D10.1.5 Statistical Profiling Extension +protocol packet headers'. + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-3-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan + +Conflicts: + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +--- + .../arm-spe-decoder/arm-spe-pkt-decoder.c | 92 +++++++++---------- + .../arm-spe-decoder/arm-spe-pkt-decoder.h | 20 ++++ + 2 files changed, 61 insertions(+), 51 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index fbededc1bcd4..a769fe5a4496 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -16,28 +16,6 @@ + #define NS_FLAG BIT_ULL(63) + #define EL_FLAG (BIT_ULL(62) | BIT_ULL(61)) + +-#define SPE_HEADER0_PAD 0x0 +-#define SPE_HEADER0_END 0x1 +-#define SPE_HEADER0_ADDRESS 0x30 /* address packet (short) */ +-#define SPE_HEADER0_ADDRESS_MASK 0x38 +-#define SPE_HEADER0_COUNTER 0x18 /* counter packet (short) */ +-#define SPE_HEADER0_COUNTER_MASK 0x38 +-#define SPE_HEADER0_TIMESTAMP 0x71 +-#define SPE_HEADER0_TIMESTAMP 0x71 +-#define SPE_HEADER0_EVENTS 0x2 +-#define SPE_HEADER0_EVENTS_MASK 0xf +-#define SPE_HEADER0_SOURCE 0x3 +-#define SPE_HEADER0_SOURCE_MASK 0xf +-#define SPE_HEADER0_CONTEXT 0x24 +-#define SPE_HEADER0_CONTEXT_MASK 0x3c +-#define SPE_HEADER0_OP_TYPE 0x8 +-#define SPE_HEADER0_OP_TYPE_MASK 0x3c +-#define SPE_HEADER1_ALIGNMENT 0x0 +-#define SPE_HEADER1_ADDRESS 0xb0 /* address packet (extended) */ +-#define SPE_HEADER1_ADDRESS_MASK 0xf8 +-#define SPE_HEADER1_COUNTER 0x98 /* counter packet (extended) */ +-#define SPE_HEADER1_COUNTER_MASK 0xf8 +- + #if __BYTE_ORDER == __BIG_ENDIAN + #define le16_to_cpu bswap_16 + #define le32_to_cpu bswap_32 +@@ -200,46 +178,58 @@ static int arm_spe_get_addr(const unsigned char *buf, size_t len, + static int arm_spe_do_get_packet(const unsigned char *buf, size_t len, + struct arm_spe_pkt *packet) + { +- unsigned int byte; ++ unsigned int hdr; ++ unsigned char ext_hdr = 0; + + memset(packet, 0, sizeof(struct arm_spe_pkt)); + + if (!len) + return ARM_SPE_NEED_MORE_BYTES; + +- byte = buf[0]; +- if (byte == SPE_HEADER0_PAD) ++ hdr = buf[0]; ++ ++ if (hdr == SPE_HEADER0_PAD) + return arm_spe_get_pad(packet); +- else if (byte == SPE_HEADER0_END) /* no timestamp at end of record */ ++ ++ if (hdr == SPE_HEADER0_END) /* no timestamp at end of record */ + return arm_spe_get_end(packet); +- else if (byte & 0xc0 /* 0y11xxxxxx */) { +- if (byte & 0x80) { +- if ((byte & SPE_HEADER0_ADDRESS_MASK) == SPE_HEADER0_ADDRESS) +- return arm_spe_get_addr(buf, len, 0, packet); +- if ((byte & SPE_HEADER0_COUNTER_MASK) == SPE_HEADER0_COUNTER) +- return arm_spe_get_counter(buf, len, 0, packet); +- } else +- if (byte == SPE_HEADER0_TIMESTAMP) +- return arm_spe_get_timestamp(buf, len, packet); +- else if ((byte & SPE_HEADER0_EVENTS_MASK) == SPE_HEADER0_EVENTS) +- return arm_spe_get_events(buf, len, packet); +- else if ((byte & SPE_HEADER0_SOURCE_MASK) == SPE_HEADER0_SOURCE) +- return arm_spe_get_data_source(buf, len, packet); +- else if ((byte & SPE_HEADER0_CONTEXT_MASK) == SPE_HEADER0_CONTEXT) +- return arm_spe_get_context(buf, len, packet); +- else if ((byte & SPE_HEADER0_OP_TYPE_MASK) == SPE_HEADER0_OP_TYPE) +- return arm_spe_get_op_type(buf, len, packet); +- } else if ((byte & 0xe0) == 0x20 /* 0y001xxxxx */) { +- /* 16-bit header */ +- byte = buf[1]; +- if (byte == SPE_HEADER1_ALIGNMENT) ++ ++ if (hdr == SPE_HEADER0_TIMESTAMP) ++ return arm_spe_get_timestamp(buf, len, packet); ++ ++ if ((hdr & SPE_HEADER0_MASK1) == SPE_HEADER0_EVENTS) ++ return arm_spe_get_events(buf, len, packet); ++ ++ if ((hdr & SPE_HEADER0_MASK1) == SPE_HEADER0_SOURCE) ++ return arm_spe_get_data_source(buf, len, packet); ++ ++ if ((hdr & SPE_HEADER0_MASK2) == SPE_HEADER0_CONTEXT) ++ return arm_spe_get_context(buf, len, packet); ++ ++ if ((hdr & SPE_HEADER0_MASK2) == SPE_HEADER0_OP_TYPE) ++ return arm_spe_get_op_type(buf, len, packet); ++ ++ if ((hdr & SPE_HEADER0_MASK2) == SPE_HEADER0_EXTENDED) { ++ /* 16-bit extended format header */ ++ ext_hdr = 1; ++ ++ hdr = buf[1]; ++ if (hdr == SPE_HEADER1_ALIGNMENT) + return arm_spe_get_alignment(buf, len, packet); +- else if ((byte & SPE_HEADER1_ADDRESS_MASK) == SPE_HEADER1_ADDRESS) +- return arm_spe_get_addr(buf, len, 1, packet); +- else if ((byte & SPE_HEADER1_COUNTER_MASK) == SPE_HEADER1_COUNTER) +- return arm_spe_get_counter(buf, len, 1, packet); + } + ++ /* ++ * The short format header's byte 0 or the extended format header's ++ * byte 1 has been assigned to 'hdr', which uses the same encoding for ++ * address packet and counter packet, so don't need to distinguish if ++ * it's short format or extended format and handle in once. ++ */ ++ if ((hdr & SPE_HEADER0_MASK3) == SPE_HEADER0_ADDRESS) ++ return arm_spe_get_addr(buf, len, ext_hdr, packet); ++ ++ if ((hdr & SPE_HEADER0_MASK3) == SPE_HEADER0_COUNTER) ++ return arm_spe_get_counter(buf, len, ext_hdr, packet); ++ + return ARM_SPE_BAD_PACKET; + } + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +index 865d1e35b401..66b99a1e3919 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +@@ -36,6 +36,26 @@ struct arm_spe_pkt { + uint64_t payload; + }; + ++/* Short header (HEADER0) and extended header (HEADER1) */ ++#define SPE_HEADER0_PAD 0x0 ++#define SPE_HEADER0_END 0x1 ++#define SPE_HEADER0_TIMESTAMP 0x71 ++/* Mask for event & data source */ ++#define SPE_HEADER0_MASK1 (GENMASK_ULL(7, 6) | GENMASK_ULL(3, 0)) ++#define SPE_HEADER0_EVENTS 0x42 ++#define SPE_HEADER0_SOURCE 0x43 ++/* Mask for context & operation */ ++#define SPE_HEADER0_MASK2 GENMASK_ULL(7, 2) ++#define SPE_HEADER0_CONTEXT 0x64 ++#define SPE_HEADER0_OP_TYPE 0x48 ++/* Mask for extended format */ ++#define SPE_HEADER0_EXTENDED 0x20 ++/* Mask for address & counter */ ++#define SPE_HEADER0_MASK3 GENMASK_ULL(7, 3) ++#define SPE_HEADER0_ADDRESS 0xb0 ++#define SPE_HEADER0_COUNTER 0x98 ++#define SPE_HEADER1_ALIGNMENT 0x0 ++ + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); + + int arm_spe_get_packet(const unsigned char *buf, size_t len, +-- +2.27.0 + diff --git a/patches/0028-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_addr.patch b/patches/0028-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_addr.patch new file mode 100644 index 0000000..d1c0993 --- /dev/null +++ b/patches/0028-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_addr.patch @@ -0,0 +1,132 @@ +From b73a4bf5e10be8bab893952e6c7d23f9dfd077cc Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:04 +0800 +Subject: [PATCH 08/21] perf arm-spe: Add new function arm_spe_pkt_desc_addr() + +mainline inclusion +from mainline-v5.11-rc1 +commit ab2aa439e4aaa3ce0fdcfa0f847aed4bf13bf353 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +This patch moves out the address parsing code from arm_spe_pkt_desc() +and uses the new introduced function arm_spe_pkt_desc_addr() to process +address packet. + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-4-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + .../arm-spe-decoder/arm-spe-pkt-decoder.c | 64 +++++++++++-------- + 1 file changed, 38 insertions(+), 26 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index a769fe5a4496..b16d68b40bbd 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -288,10 +288,46 @@ static int arm_spe_pkt_out_string(int *err, char **buf_p, size_t *blen, + return ret; + } + ++static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, ++ char *buf, size_t buf_len) ++{ ++ int ns, el, idx = packet->index; ++ u64 payload = packet->payload; ++ int err = 0; ++ ++ switch (idx) { ++ case 0: ++ case 1: ++ ns = !!(packet->payload & NS_FLAG); ++ el = (packet->payload & EL_FLAG) >> 61; ++ payload &= ~(0xffULL << 56); ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, ++ "%s 0x%llx el%d ns=%d", ++ (idx == 1) ? "TGT" : "PC", payload, el, ns); ++ break; ++ case 2: ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, ++ "VA 0x%llx", payload); ++ break; ++ case 3: ++ ns = !!(packet->payload & NS_FLAG); ++ payload &= ~(0xffULL << 56); ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, ++ "PA 0x%llx ns=%d", payload, ns); ++ break; ++ default: ++ /* Unknown index */ ++ err = -1; ++ break; ++ } ++ ++ return err; ++} ++ + int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, + size_t buf_len) + { +- int ns, el, idx = packet->index; ++ int idx = packet->index; + unsigned long long payload = packet->payload; + const char *name = arm_spe_pkt_name(packet->type); + char *buf_orig = buf; +@@ -373,31 +409,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, + arm_spe_pkt_out_string(&err, &buf, &blen, "%s %lld", name, payload); + break; + case ARM_SPE_ADDRESS: +- switch (idx) { +- case 0: +- case 1: +- ns = !!(packet->payload & NS_FLAG); +- el = (packet->payload & EL_FLAG) >> 61; +- payload &= ~(0xffULL << 56); +- arm_spe_pkt_out_string(&err, &buf, &blen, +- "%s 0x%llx el%d ns=%d", +- (idx == 1) ? "TGT" : "PC", payload, el, ns); +- break; +- case 2: +- arm_spe_pkt_out_string(&err, &buf, &blen, +- "VA 0x%llx", payload); +- break; +- case 3: +- ns = !!(packet->payload & NS_FLAG); +- payload &= ~(0xffULL << 56); +- arm_spe_pkt_out_string(&err, &buf, &blen, +- "PA 0x%llx ns=%d", payload, ns); +- break; +- default: +- /* Unknown index */ +- err = -1; +- break; +- } ++ err = arm_spe_pkt_desc_addr(packet, buf, buf_len); + break; + case ARM_SPE_CONTEXT: + arm_spe_pkt_out_string(&err, &buf, &blen, "%s 0x%lx el%d", +-- +2.27.0 + diff --git a/patches/0029-perf-arm-spe-Refactor-address-packet-handling.patch b/patches/0029-perf-arm-spe-Refactor-address-packet-handling.patch new file mode 100644 index 0000000..97fa5fd --- /dev/null +++ b/patches/0029-perf-arm-spe-Refactor-address-packet-handling.patch @@ -0,0 +1,146 @@ +From c97102a71dc15b73456f00c97e4848a8a72b758a Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:05 +0800 +Subject: [PATCH 09/21] perf arm-spe: Refactor address packet handling + +mainline inclusion +from mainline-v5.11-rc1 +commit 09935ca7b64cfa379b6ebf2b8cdb3126e09bffab +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +This patch is to refactor address packet handling, it defines macros for +address packet's header and payload, these macros are used by decoder +and the dump flow. + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-5-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan + +Conflicts: + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +--- + .../arm-spe-decoder/arm-spe-pkt-decoder.c | 26 +++++++++---------- + .../arm-spe-decoder/arm-spe-pkt-decoder.h | 23 ++++++++++++++++ + 2 files changed, 35 insertions(+), 14 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index b16d68b40bbd..d37c4008adbc 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -13,9 +13,6 @@ + + #include "arm-spe-pkt-decoder.h" + +-#define NS_FLAG BIT_ULL(63) +-#define EL_FLAG (BIT_ULL(62) | BIT_ULL(61)) +- + #if __BYTE_ORDER == __BIG_ENDIAN + #define le16_to_cpu bswap_16 + #define le32_to_cpu bswap_32 +@@ -167,10 +164,11 @@ static int arm_spe_get_addr(const unsigned char *buf, size_t len, + const unsigned char ext_hdr, struct arm_spe_pkt *packet) + { + packet->type = ARM_SPE_ADDRESS; ++ + if (ext_hdr) +- packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7); ++ packet->index = SPE_HDR_EXTENDED_INDEX(buf[0], buf[1]); + else +- packet->index = buf[0] & 0x7; ++ packet->index = SPE_HDR_SHORT_INDEX(buf[0]); + + return arm_spe_get_payload(buf, len, ext_hdr, packet); + } +@@ -296,22 +294,22 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, + int err = 0; + + switch (idx) { +- case 0: +- case 1: +- ns = !!(packet->payload & NS_FLAG); +- el = (packet->payload & EL_FLAG) >> 61; +- payload &= ~(0xffULL << 56); ++ case SPE_ADDR_PKT_HDR_INDEX_INS: ++ case SPE_ADDR_PKT_HDR_INDEX_BRANCH: ++ ns = !!SPE_ADDR_PKT_GET_NS(payload); ++ el = SPE_ADDR_PKT_GET_EL(payload); ++ payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload); + arm_spe_pkt_out_string(&err, &buf, &buf_len, + "%s 0x%llx el%d ns=%d", + (idx == 1) ? "TGT" : "PC", payload, el, ns); + break; +- case 2: ++ case SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT: + arm_spe_pkt_out_string(&err, &buf, &buf_len, + "VA 0x%llx", payload); + break; +- case 3: +- ns = !!(packet->payload & NS_FLAG); +- payload &= ~(0xffULL << 56); ++ case SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS: ++ ns = !!SPE_ADDR_PKT_GET_NS(payload); ++ payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload); + arm_spe_pkt_out_string(&err, &buf, &buf_len, + "PA 0x%llx ns=%d", payload, ns); + break; +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +index 66b99a1e3919..f97d6840be3a 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +@@ -56,6 +56,29 @@ struct arm_spe_pkt { + #define SPE_HEADER0_COUNTER 0x98 + #define SPE_HEADER1_ALIGNMENT 0x0 + ++#define SPE_HDR_SHORT_INDEX(h) ((h) & GENMASK_ULL(2, 0)) ++#define SPE_HDR_EXTENDED_INDEX(h0, h1) (((h0) & GENMASK_ULL(1, 0)) << 3 | \ ++ SPE_HDR_SHORT_INDEX(h1)) ++ ++/* Address packet header */ ++#define SPE_ADDR_PKT_HDR_INDEX_INS 0x0 ++#define SPE_ADDR_PKT_HDR_INDEX_BRANCH 0x1 ++#define SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT 0x2 ++#define SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS 0x3 ++ ++/* Address packet payload */ ++#define SPE_ADDR_PKT_ADDR_BYTE7_SHIFT 56 ++#define SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(v) ((v) & GENMASK_ULL(55, 0)) ++#define SPE_ADDR_PKT_ADDR_GET_BYTE_6(v) (((v) & GENMASK_ULL(55, 48)) >> 48) ++ ++#define SPE_ADDR_PKT_GET_NS(v) (((v) & BIT_ULL(63)) >> 63) ++#define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >> 61) ++ ++#define SPE_ADDR_PKT_EL0 0 ++#define SPE_ADDR_PKT_EL1 1 ++#define SPE_ADDR_PKT_EL2 2 ++#define SPE_ADDR_PKT_EL3 3 ++ + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); + + int arm_spe_get_packet(const unsigned char *buf, size_t len, +-- +2.27.0 + diff --git a/patches/0030-perf-arm-spe-Refactor-context-packet-handling.patch b/patches/0030-perf-arm-spe-Refactor-context-packet-handling.patch new file mode 100644 index 0000000..ef3aa1f --- /dev/null +++ b/patches/0030-perf-arm-spe-Refactor-context-packet-handling.patch @@ -0,0 +1,73 @@ +From 804f63157ab444ba941a7f6960d954d48d4b29ea Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:07 +0800 +Subject: [PATCH 10/21] perf arm-spe: Refactor context packet handling + +mainline inclusion +from mainline-v5.11-rc1 +commit 6550149e801a32b1533ed86509af76319cb75eba +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +Minor refactoring to use macro for index mask. + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-7-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 2 +- + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h | 3 +++ + 2 files changed, 4 insertions(+), 1 deletion(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index d37c4008adbc..978f5551b82c 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -136,7 +136,7 @@ static int arm_spe_get_context(const unsigned char *buf, size_t len, + struct arm_spe_pkt *packet) + { + packet->type = ARM_SPE_CONTEXT; +- packet->index = buf[0] & 0x3; ++ packet->index = SPE_CTX_PKT_HDR_INDEX(buf[0]); + return arm_spe_get_payload(buf, len, 0, packet); + } + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +index f97d6840be3a..9bc876bffd35 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +@@ -79,6 +79,9 @@ struct arm_spe_pkt { + #define SPE_ADDR_PKT_EL2 2 + #define SPE_ADDR_PKT_EL3 3 + ++/* Context packet header */ ++#define SPE_CTX_PKT_HDR_INDEX(h) ((h) & GENMASK_ULL(1, 0)) ++ + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); + + int arm_spe_get_packet(const unsigned char *buf, size_t len, +-- +2.27.0 + diff --git a/patches/0031-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_count.patch b/patches/0031-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_count.patch new file mode 100644 index 0000000..e545e8f --- /dev/null +++ b/patches/0031-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_count.patch @@ -0,0 +1,108 @@ +From 3486742b3d287c5650ccec76aeb7fc7e1eaa69f5 Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:08 +0800 +Subject: [PATCH 11/21] perf arm-spe: Add new function + arm_spe_pkt_desc_counter() + +mainline inclusion +from mainline-v5.11-rc1 +commit c52cfe9872132407eef6d734014d6fd7790146f5 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +This patch moves out the counter packet parsing code from +arm_spe_pkt_desc() to the new function arm_spe_pkt_desc_counter(). + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-8-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + .../arm-spe-decoder/arm-spe-pkt-decoder.c | 43 ++++++++++++------- + 1 file changed, 28 insertions(+), 15 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 978f5551b82c..397ade5ffdeb 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -322,6 +322,33 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, + return err; + } + ++static int arm_spe_pkt_desc_counter(const struct arm_spe_pkt *packet, ++ char *buf, size_t buf_len) ++{ ++ u64 payload = packet->payload; ++ const char *name = arm_spe_pkt_name(packet->type); ++ int err = 0; ++ ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, "%s %d ", name, ++ (unsigned short)payload); ++ ++ switch (packet->index) { ++ case 0: ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, "TOT"); ++ break; ++ case 1: ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, "ISSUE"); ++ break; ++ case 2: ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, "XLAT"); ++ break; ++ default: ++ break; ++ } ++ ++ return err; ++} ++ + int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, + size_t buf_len) + { +@@ -414,21 +441,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, + name, (unsigned long)payload, idx + 1); + break; + case ARM_SPE_COUNTER: +- arm_spe_pkt_out_string(&err, &buf, &blen, "%s %d ", name, +- (unsigned short)payload); +- switch (idx) { +- case 0: +- arm_spe_pkt_out_string(&err, &buf, &blen, "TOT"); +- break; +- case 1: +- arm_spe_pkt_out_string(&err, &buf, &blen, "ISSUE"); +- break; +- case 2: +- arm_spe_pkt_out_string(&err, &buf, &blen, "XLAT"); +- break; +- default: +- break; +- } ++ err = arm_spe_pkt_desc_counter(packet, buf, buf_len); + break; + default: + /* Unknown packet type */ +-- +2.27.0 + diff --git a/patches/0032-perf-arm-spe-Refactor-counter-packet-handling.patch b/patches/0032-perf-arm-spe-Refactor-counter-packet-handling.patch new file mode 100644 index 0000000..d415ab1 --- /dev/null +++ b/patches/0032-perf-arm-spe-Refactor-counter-packet-handling.patch @@ -0,0 +1,102 @@ +From 07cc8f3f50f3a4f74abc1f1e9948a85a596f9539 Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:09 +0800 +Subject: [PATCH 12/21] perf arm-spe: Refactor counter packet handling + +mainline inclusion +from mainline-v5.11-rc1 +commit d158aa408f221756f99edb128ef35bfd4d3361d5 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +This patch defines macros for counter packet header, and uses macros to +replace hard code values in functions arm_spe_get_counter() and +arm_spe_pkt_desc(). + +In the function arm_spe_get_counter(), adds a new line for more +readable. + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-9-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 11 ++++++----- + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h | 5 +++++ + 2 files changed, 11 insertions(+), 5 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 397ade5ffdeb..52f4339b1f0c 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -152,10 +152,11 @@ static int arm_spe_get_counter(const unsigned char *buf, size_t len, + const unsigned char ext_hdr, struct arm_spe_pkt *packet) + { + packet->type = ARM_SPE_COUNTER; ++ + if (ext_hdr) +- packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7); ++ packet->index = SPE_HDR_EXTENDED_INDEX(buf[0], buf[1]); + else +- packet->index = buf[0] & 0x7; ++ packet->index = SPE_HDR_SHORT_INDEX(buf[0]); + + return arm_spe_get_payload(buf, len, ext_hdr, packet); + } +@@ -333,13 +334,13 @@ static int arm_spe_pkt_desc_counter(const struct arm_spe_pkt *packet, + (unsigned short)payload); + + switch (packet->index) { +- case 0: ++ case SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT: + arm_spe_pkt_out_string(&err, &buf, &buf_len, "TOT"); + break; +- case 1: ++ case SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT: + arm_spe_pkt_out_string(&err, &buf, &buf_len, "ISSUE"); + break; +- case 2: ++ case SPE_CNT_PKT_HDR_INDEX_TRANS_LAT: + arm_spe_pkt_out_string(&err, &buf, &buf_len, "XLAT"); + break; + default: +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +index 9bc876bffd35..7d8e34e35f05 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +@@ -82,6 +82,11 @@ struct arm_spe_pkt { + /* Context packet header */ + #define SPE_CTX_PKT_HDR_INDEX(h) ((h) & GENMASK_ULL(1, 0)) + ++/* Counter packet header */ ++#define SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT 0x0 ++#define SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT 0x1 ++#define SPE_CNT_PKT_HDR_INDEX_TRANS_LAT 0x2 ++ + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); + + int arm_spe_get_packet(const unsigned char *buf, size_t len, +-- +2.27.0 + diff --git a/patches/0033-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_event.patch b/patches/0033-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_event.patch new file mode 100644 index 0000000..388f3fc --- /dev/null +++ b/patches/0033-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_event.patch @@ -0,0 +1,127 @@ +From 947dbf5874fd55dd5fe536fe02b3ff699d4efbf5 Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:10 +0800 +Subject: [PATCH 13/21] perf arm-spe: Add new function arm_spe_pkt_desc_event() + +mainline inclusion +from mainline-v5.11-rc1 +commit e66f6d75960220001ce94afe93c981826235c003 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +This patch moves out the event packet parsing from arm_spe_pkt_desc() +to the new function arm_spe_pkt_desc_event(). + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-10-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + .../arm-spe-decoder/arm-spe-pkt-decoder.c | 63 +++++++++++-------- + 1 file changed, 37 insertions(+), 26 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 52f4339b1f0c..da6b9f76739c 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -287,6 +287,42 @@ static int arm_spe_pkt_out_string(int *err, char **buf_p, size_t *blen, + return ret; + } + ++static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet, ++ char *buf, size_t buf_len) ++{ ++ u64 payload = packet->payload; ++ int err = 0; ++ ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, "EV"); ++ ++ if (payload & 0x1) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " EXCEPTION-GEN"); ++ if (payload & 0x2) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " RETIRED"); ++ if (payload & 0x4) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " L1D-ACCESS"); ++ if (payload & 0x8) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " L1D-REFILL"); ++ if (payload & 0x10) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " TLB-ACCESS"); ++ if (payload & 0x20) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " TLB-REFILL"); ++ if (payload & 0x40) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " NOT-TAKEN"); ++ if (payload & 0x80) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " MISPRED"); ++ if (packet->index > 1) { ++ if (payload & 0x100) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " LLC-ACCESS"); ++ if (payload & 0x200) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " LLC-REFILL"); ++ if (payload & 0x400) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " REMOTE-ACCESS"); ++ } ++ ++ return err; ++} ++ + static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, + char *buf, size_t buf_len) + { +@@ -367,32 +403,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, + arm_spe_pkt_out_string(&err, &buf, &blen, "%s", name); + break; + case ARM_SPE_EVENTS: +- arm_spe_pkt_out_string(&err, &buf, &blen, "EV"); +- +- if (payload & 0x1) +- arm_spe_pkt_out_string(&err, &buf, &blen, " EXCEPTION-GEN"); +- if (payload & 0x2) +- arm_spe_pkt_out_string(&err, &buf, &blen, " RETIRED"); +- if (payload & 0x4) +- arm_spe_pkt_out_string(&err, &buf, &blen, " L1D-ACCESS"); +- if (payload & 0x8) +- arm_spe_pkt_out_string(&err, &buf, &blen, " L1D-REFILL"); +- if (payload & 0x10) +- arm_spe_pkt_out_string(&err, &buf, &blen, " TLB-ACCESS"); +- if (payload & 0x20) +- arm_spe_pkt_out_string(&err, &buf, &blen, " TLB-REFILL"); +- if (payload & 0x40) +- arm_spe_pkt_out_string(&err, &buf, &blen, " NOT-TAKEN"); +- if (payload & 0x80) +- arm_spe_pkt_out_string(&err, &buf, &blen, " MISPRED"); +- if (idx > 1) { +- if (payload & 0x100) +- arm_spe_pkt_out_string(&err, &buf, &blen, " LLC-ACCESS"); +- if (payload & 0x200) +- arm_spe_pkt_out_string(&err, &buf, &blen, " LLC-REFILL"); +- if (payload & 0x400) +- arm_spe_pkt_out_string(&err, &buf, &blen, " REMOTE-ACCESS"); +- } ++ err = arm_spe_pkt_desc_event(packet, buf, buf_len); + break; + case ARM_SPE_OP_TYPE: + switch (idx) { +-- +2.27.0 + diff --git a/patches/0034-perf-arm-spe-Refactor-event-type-handling.patch b/patches/0034-perf-arm-spe-Refactor-event-type-handling.patch new file mode 100644 index 0000000..f61f189 --- /dev/null +++ b/patches/0034-perf-arm-spe-Refactor-event-type-handling.patch @@ -0,0 +1,171 @@ +From 6bc7b166d7a3d17413c0d948553f18b66dbfe42d Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:11 +0800 +Subject: [PATCH 14/21] perf arm-spe: Refactor event type handling + +mainline inclusion +from mainline-v5.11-rc1 +commit 889d1a675fcfe734f83c459de023a6f0a91a7a0e +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +Move the enums of event types to arm-spe-pkt-decoder.h, thus function +arm_spe_pkt_desc_event() can use them for bitmasks. + +Suggested-by: Andre Przywara +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-11-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan + +Conflicts: + tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +--- + .../util/arm-spe-decoder/arm-spe-decoder.c | 4 ++-- + .../util/arm-spe-decoder/arm-spe-decoder.h | 14 ------------ + .../arm-spe-decoder/arm-spe-pkt-decoder.c | 22 +++++++++---------- + .../arm-spe-decoder/arm-spe-pkt-decoder.h | 18 +++++++++++++++ + 4 files changed, 31 insertions(+), 27 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +index 3993c1524c73..2ca980fff04a 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +@@ -200,13 +200,13 @@ static int arm_spe_walk_trace(struct arm_spe_decoder *decoder) + } + break; + case ARM_SPE_EVENTS: +- if (payload & BIT(EV_TLB_REFILL)) { ++ if (payload & BIT(EV_TLB_WALK)) { + decoder->state.type |= ARM_SPE_TLB_MISS; + decoder->state.is_tlb_miss = true; + } + if (payload & BIT(EV_MISPRED)) + decoder->state.type |= ARM_SPE_BRANCH_MISS; +- if (idx > 1 && (payload & BIT(EV_LLC_REFILL))) { ++ if (idx > 1 && (payload & BIT(EV_LLC_MISS))) { + decoder->state.type |= ARM_SPE_LLC_MISS; + decoder->state.is_llc_miss = true; + } +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h +index 36d593eda778..17db7d1c14a9 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h +@@ -6,20 +6,6 @@ + #include + #include + +-enum arm_spe_events { +- EV_EXCEPTION_GEN, +- EV_RETIRED, +- EV_L1D_ACCESS, +- EV_L1D_REFILL, +- EV_TLB_ACCESS, +- EV_TLB_REFILL, +- EV_NOT_TAKEN, +- EV_MISPRED, +- EV_LLC_ACCESS, +- EV_LLC_REFILL, +- EV_REMOTE_ACCESS, +-}; +- + enum arm_spe_sample_type { + ARM_SPE_LLC_MISS = 1 << 0, + ARM_SPE_TLB_MISS = 1 << 1, +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index da6b9f76739c..3f30b2937715 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -295,28 +295,28 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet, + + arm_spe_pkt_out_string(&err, &buf, &buf_len, "EV"); + +- if (payload & 0x1) ++ if (payload & BIT(EV_EXCEPTION_GEN)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " EXCEPTION-GEN"); +- if (payload & 0x2) ++ if (payload & BIT(EV_RETIRED)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " RETIRED"); +- if (payload & 0x4) ++ if (payload & BIT(EV_L1D_ACCESS)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " L1D-ACCESS"); +- if (payload & 0x8) ++ if (payload & BIT(EV_L1D_REFILL)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " L1D-REFILL"); +- if (payload & 0x10) ++ if (payload & BIT(EV_TLB_ACCESS)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " TLB-ACCESS"); +- if (payload & 0x20) ++ if (payload & BIT(EV_TLB_WALK)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " TLB-REFILL"); +- if (payload & 0x40) ++ if (payload & BIT(EV_NOT_TAKEN)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " NOT-TAKEN"); +- if (payload & 0x80) ++ if (payload & BIT(EV_MISPRED)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " MISPRED"); + if (packet->index > 1) { +- if (payload & 0x100) ++ if (payload & BIT(EV_LLC_ACCESS)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " LLC-ACCESS"); +- if (payload & 0x200) ++ if (payload & BIT(EV_LLC_MISS)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " LLC-REFILL"); +- if (payload & 0x400) ++ if (payload & BIT(EV_REMOTE_ACCESS)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " REMOTE-ACCESS"); + } + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +index 7d8e34e35f05..42ed4e61ede2 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +@@ -87,6 +87,24 @@ struct arm_spe_pkt { + #define SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT 0x1 + #define SPE_CNT_PKT_HDR_INDEX_TRANS_LAT 0x2 + ++/* Event packet payload */ ++enum arm_spe_events { ++ EV_EXCEPTION_GEN = 0, ++ EV_RETIRED = 1, ++ EV_L1D_ACCESS = 2, ++ EV_L1D_REFILL = 3, ++ EV_TLB_ACCESS = 4, ++ EV_TLB_WALK = 5, ++ EV_NOT_TAKEN = 6, ++ EV_MISPRED = 7, ++ EV_LLC_ACCESS = 8, ++ EV_LLC_MISS = 9, ++ EV_REMOTE_ACCESS = 10, ++ EV_ALIGNMENT = 11, ++ EV_PARTIAL_PREDICATE = 17, ++ EV_EMPTY_PREDICATE = 18, ++}; ++ + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); + + int arm_spe_get_packet(const unsigned char *buf, size_t len, +-- +2.27.0 + diff --git a/patches/0035-perf-arm-spe-Remove-size-condition-checking-for-even.patch b/patches/0035-perf-arm-spe-Remove-size-condition-checking-for-even.patch new file mode 100644 index 0000000..39ff381 --- /dev/null +++ b/patches/0035-perf-arm-spe-Remove-size-condition-checking-for-even.patch @@ -0,0 +1,91 @@ +From 18de9e65c81f31b2855301308c05a55002f89239 Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:12 +0800 +Subject: [PATCH 15/21] perf arm-spe: Remove size condition checking for events + +mainline inclusion +from mainline-v5.11-rc1 +commit 4d0f4ca273aa95bf592b8bad3c619b5766c8ecc7 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +In the Armv8 ARM (ARM DDI 0487F.c), chapter "D10.2.6 Events packet", it +describes the event bit is valid with specific payload requirement. For +example, the Last Level cache access event, the bit is defined as: + + E[8], byte 1 bit [0], when SZ == 0b01 , when SZ == 0b10 , + or when SZ == 0b11 + +It requires the payload size is at least 2 bytes, when byte 1 (start +counting from 0) is valid, E[8] (bit 0 in byte 1) can be used for LLC +access event type. For safety, the code checks the condition for +payload size firstly, if meet the requirement for payload size, then +continue to parse event type. + +If review function arm_spe_get_payload(), it has used cast, so any bytes +beyond the valid size have been set to zeros. + +For this reason, we don't need to check payload size anymore afterwards +when parse events, thus this patch removes payload size conditions. + +Suggested-by: Andre Przywara +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-12-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan + +Conflicts: + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +--- + .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 14 ++++++-------- + 1 file changed, 6 insertions(+), 8 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 3f30b2937715..88bcf7e5be76 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -311,14 +311,12 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet, + arm_spe_pkt_out_string(&err, &buf, &buf_len, " NOT-TAKEN"); + if (payload & BIT(EV_MISPRED)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " MISPRED"); +- if (packet->index > 1) { +- if (payload & BIT(EV_LLC_ACCESS)) +- arm_spe_pkt_out_string(&err, &buf, &buf_len, " LLC-ACCESS"); +- if (payload & BIT(EV_LLC_MISS)) +- arm_spe_pkt_out_string(&err, &buf, &buf_len, " LLC-REFILL"); +- if (payload & BIT(EV_REMOTE_ACCESS)) +- arm_spe_pkt_out_string(&err, &buf, &buf_len, " REMOTE-ACCESS"); +- } ++ if (payload & BIT(EV_LLC_ACCESS)) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " LLC-ACCESS"); ++ if (payload & BIT(EV_LLC_MISS)) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " LLC-REFILL"); ++ if (payload & BIT(EV_REMOTE_ACCESS)) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " REMOTE-ACCESS"); + + return err; + } +-- +2.27.0 + diff --git a/patches/0036-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_op_ty.patch b/patches/0036-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_op_ty.patch new file mode 100644 index 0000000..8c2f01b --- /dev/null +++ b/patches/0036-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_op_ty.patch @@ -0,0 +1,146 @@ +From 5428287200dbce2d9e5dbd50e4f32c5cf81a953f Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:13 +0800 +Subject: [PATCH 16/21] perf arm-spe: Add new function + arm_spe_pkt_desc_op_type() + +mainline inclusion +from mainline-v5.11-rc1 +commit 7488ffc4d981e19feddfe36a619051bf6216c7a1 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +The operation type packet is complex and contains subclass; the parsing +flow causes deep indentation; for more readable, this patch introduces +a new function arm_spe_pkt_desc_op_type() which is used for operation +type parsing. + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-13-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + .../arm-spe-decoder/arm-spe-pkt-decoder.c | 79 +++++++++++-------- + 1 file changed, 45 insertions(+), 34 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 88bcf7e5be76..d6c060f119b4 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -321,6 +321,50 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet, + return err; + } + ++static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, ++ char *buf, size_t buf_len) ++{ ++ u64 payload = packet->payload; ++ int err = 0; ++ ++ switch (packet->index) { ++ case 0: ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, ++ payload & 0x1 ? "COND-SELECT" : "INSN-OTHER"); ++ break; ++ case 1: ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, ++ payload & 0x1 ? "ST" : "LD"); ++ ++ if (payload & 0x2) { ++ if (payload & 0x4) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " AT"); ++ if (payload & 0x8) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " EXCL"); ++ if (payload & 0x10) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " AR"); ++ } else if (payload & 0x4) { ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " SIMD-FP"); ++ } ++ break; ++ case 2: ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, "B"); ++ ++ if (payload & 0x1) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " COND"); ++ if (payload & 0x2) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " IND"); ++ ++ break; ++ default: ++ /* Unknown index */ ++ err = -1; ++ break; ++ } ++ ++ return err; ++} ++ + static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, + char *buf, size_t buf_len) + { +@@ -404,40 +448,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, + err = arm_spe_pkt_desc_event(packet, buf, buf_len); + break; + case ARM_SPE_OP_TYPE: +- switch (idx) { +- case 0: +- arm_spe_pkt_out_string(&err, &buf, &blen, +- payload & 0x1 ? "COND-SELECT" : "INSN-OTHER"); +- break; +- case 1: +- arm_spe_pkt_out_string(&err, &buf, &blen, +- payload & 0x1 ? "ST" : "LD"); +- +- if (payload & 0x2) { +- if (payload & 0x4) +- arm_spe_pkt_out_string(&err, &buf, &blen, " AT"); +- if (payload & 0x8) +- arm_spe_pkt_out_string(&err, &buf, &blen, " EXCL"); +- if (payload & 0x10) +- arm_spe_pkt_out_string(&err, &buf, &blen, " AR"); +- } else if (payload & 0x4) { +- arm_spe_pkt_out_string(&err, &buf, &blen, " SIMD-FP"); +- } +- break; +- case 2: +- arm_spe_pkt_out_string(&err, &buf, &blen, "B"); +- +- if (payload & 0x1) +- arm_spe_pkt_out_string(&err, &buf, &blen, " COND"); +- if (payload & 0x2) +- arm_spe_pkt_out_string(&err, &buf, &blen, " IND"); +- +- break; +- default: +- /* Unknown index */ +- err = -1; +- break; +- } ++ err = arm_spe_pkt_desc_op_type(packet, buf, buf_len); + break; + case ARM_SPE_DATA_SOURCE: + case ARM_SPE_TIMESTAMP: +-- +2.27.0 + diff --git a/patches/0037-perf-arm-spe-Refactor-operation-packet-handling.patch b/patches/0037-perf-arm-spe-Refactor-operation-packet-handling.patch new file mode 100644 index 0000000..818822d --- /dev/null +++ b/patches/0037-perf-arm-spe-Refactor-operation-packet-handling.patch @@ -0,0 +1,140 @@ +From fca84900bf3f1269b6669e7f3dc99810e65d75c8 Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:14 +0800 +Subject: [PATCH 17/21] perf arm-spe: Refactor operation packet handling + +mainline inclusion +from mainline-v5.11-rc1 +commit e771218f32f97c0940ae46c23e20d27f3d4c05e3 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +Defines macros for operation packet header and formats (support sub +classes for 'other', 'branch', 'load and store', etc). Uses these +macros for operation packet decoding and dumping. + +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-14-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + .../arm-spe-decoder/arm-spe-pkt-decoder.c | 26 ++++++++++--------- + .../arm-spe-decoder/arm-spe-pkt-decoder.h | 23 ++++++++++++++++ + 2 files changed, 37 insertions(+), 12 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index d6c060f119b4..1d1354a0eef4 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -144,7 +144,7 @@ static int arm_spe_get_op_type(const unsigned char *buf, size_t len, + struct arm_spe_pkt *packet) + { + packet->type = ARM_SPE_OP_TYPE; +- packet->index = buf[0] & 0x3; ++ packet->index = SPE_OP_PKT_HDR_CLASS(buf[0]); + return arm_spe_get_payload(buf, len, 0, packet); + } + +@@ -328,31 +328,33 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, + int err = 0; + + switch (packet->index) { +- case 0: ++ case SPE_OP_PKT_HDR_CLASS_OTHER: + arm_spe_pkt_out_string(&err, &buf, &buf_len, +- payload & 0x1 ? "COND-SELECT" : "INSN-OTHER"); ++ payload & SPE_OP_PKT_COND ? "COND-SELECT" : "INSN-OTHER"); + break; +- case 1: ++ case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC: + arm_spe_pkt_out_string(&err, &buf, &buf_len, + payload & 0x1 ? "ST" : "LD"); + +- if (payload & 0x2) { +- if (payload & 0x4) ++ if (SPE_OP_PKT_IS_LDST_ATOMIC(payload)) { ++ if (payload & SPE_OP_PKT_AT) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " AT"); +- if (payload & 0x8) ++ if (payload & SPE_OP_PKT_EXCL) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " EXCL"); +- if (payload & 0x10) ++ if (payload & SPE_OP_PKT_AR) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " AR"); +- } else if (payload & 0x4) { ++ } else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) == ++ SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) { + arm_spe_pkt_out_string(&err, &buf, &buf_len, " SIMD-FP"); + } + break; +- case 2: ++ case SPE_OP_PKT_HDR_CLASS_BR_ERET: + arm_spe_pkt_out_string(&err, &buf, &buf_len, "B"); + +- if (payload & 0x1) ++ if (payload & SPE_OP_PKT_COND) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " COND"); +- if (payload & 0x2) ++ ++ if (SPE_OP_PKT_IS_INDIRECT_BRANCH(payload)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " IND"); + + break; +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +index 42ed4e61ede2..7032fc141ad4 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +@@ -105,6 +105,29 @@ enum arm_spe_events { + EV_EMPTY_PREDICATE = 18, + }; + ++/* Operation packet header */ ++#define SPE_OP_PKT_HDR_CLASS(h) ((h) & GENMASK_ULL(1, 0)) ++#define SPE_OP_PKT_HDR_CLASS_OTHER 0x0 ++#define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC 0x1 ++#define SPE_OP_PKT_HDR_CLASS_BR_ERET 0x2 ++ ++#define SPE_OP_PKT_COND BIT(0) ++ ++#define SPE_OP_PKT_LDST_SUBCLASS_GET(v) ((v) & GENMASK_ULL(7, 1)) ++#define SPE_OP_PKT_LDST_SUBCLASS_GP_REG 0x0 ++#define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP 0x4 ++#define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG 0x10 ++#define SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG 0x30 ++ ++#define SPE_OP_PKT_IS_LDST_ATOMIC(v) (((v) & (GENMASK_ULL(7, 5) | BIT(1))) == 0x2) ++ ++#define SPE_OP_PKT_AR BIT(4) ++#define SPE_OP_PKT_EXCL BIT(3) ++#define SPE_OP_PKT_AT BIT(2) ++#define SPE_OP_PKT_ST BIT(0) ++ ++#define SPE_OP_PKT_IS_INDIRECT_BRANCH(v) (((v) & GENMASK_ULL(7, 1)) == 0x2) ++ + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); + + int arm_spe_get_packet(const unsigned char *buf, size_t len, +-- +2.27.0 + diff --git a/patches/0038-perf-arm-spe-Add-more-sub-classes-for-operation-pack.patch b/patches/0038-perf-arm-spe-Add-more-sub-classes-for-operation-pack.patch new file mode 100644 index 0000000..fb97c7e --- /dev/null +++ b/patches/0038-perf-arm-spe-Add-more-sub-classes-for-operation-pack.patch @@ -0,0 +1,90 @@ +From 574ebcfb7fa23c87ee9bf03f46db5e4a9fb99b7d Mon Sep 17 00:00:00 2001 +From: Leo Yan +Date: Fri, 31 Dec 2021 13:32:15 +0800 +Subject: [PATCH 18/21] perf arm-spe: Add more sub classes for operation packet + +mainline inclusion +from mainline-v5.11-rc1 +commit 3d829724b16c5d2de42e6c9601c696c93a10bc61 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +For the operation type packet payload with load/store class, it misses +to support these sub classes: + + - A load/store targeting the general-purpose registers; + - A load/store targeting unspecified registers; + - The ARMv8.4 nested virtualisation extension can redirect system + register accesses to a memory page controlled by the hypervisor. + The SPE profiling feature in newer implementations can tag those + memory accesses accordingly. + +Add the bit pattern describing load/store sub classes, so that the perf +tool can decode it properly. + +Inspired by Andre Przywara, refined the commit log and code for more +clear description. + +Co-developed-by: Andre Przywara +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-15-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 18 ++++++++++++++++-- + 1 file changed, 16 insertions(+), 2 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 1d1354a0eef4..84d661aab54f 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -343,9 +343,23 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, + arm_spe_pkt_out_string(&err, &buf, &buf_len, " EXCL"); + if (payload & SPE_OP_PKT_AR) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " AR"); +- } else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) == +- SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) { ++ } ++ ++ switch (SPE_OP_PKT_LDST_SUBCLASS_GET(payload)) { ++ case SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP: + arm_spe_pkt_out_string(&err, &buf, &buf_len, " SIMD-FP"); ++ break; ++ case SPE_OP_PKT_LDST_SUBCLASS_GP_REG: ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " GP-REG"); ++ break; ++ case SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG: ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " UNSPEC-REG"); ++ break; ++ case SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG: ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " NV-SYSREG"); ++ break; ++ default: ++ break; + } + break; + case SPE_OP_PKT_HDR_CLASS_BR_ERET: +-- +2.27.0 + diff --git a/patches/0039-perf-arm_spe-Decode-memory-tagging-properties.patch b/patches/0039-perf-arm_spe-Decode-memory-tagging-properties.patch new file mode 100644 index 0000000..6aca321 --- /dev/null +++ b/patches/0039-perf-arm_spe-Decode-memory-tagging-properties.patch @@ -0,0 +1,90 @@ +From eac9484827942af027d362264f1730824e162108 Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Fri, 31 Dec 2021 13:32:16 +0800 +Subject: [PATCH 19/21] perf arm_spe: Decode memory tagging properties + +mainline inclusion +from mainline-v5.11-rc1 +commit 3601e605501df289db149785e1e6a8d16e557d31 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +When SPE records a physical address, it can additionally tag the event +with information from the Memory Tagging architecture extension. + +Decode the two additional fields in the SPE event payload. + +[leoy: Refined patch to use predefined macros] + +Signed-off-by: Andre Przywara +Signed-off-by: Leo Yan +Reviewed-by: Dave Martin +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Wei Li +Link: https://lore.kernel.org/r/20201119152441.6972-16-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Wei Li +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 6 +++++- + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h | 2 ++ + 2 files changed, 7 insertions(+), 1 deletion(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 84d661aab54f..57c01ce27915 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -385,6 +385,7 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, + char *buf, size_t buf_len) + { + int ns, el, idx = packet->index; ++ int ch, pat; + u64 payload = packet->payload; + int err = 0; + +@@ -404,9 +405,12 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, + break; + case SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS: + ns = !!SPE_ADDR_PKT_GET_NS(payload); ++ ch = !!SPE_ADDR_PKT_GET_CH(payload); ++ pat = SPE_ADDR_PKT_GET_PAT(payload); + payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload); + arm_spe_pkt_out_string(&err, &buf, &buf_len, +- "PA 0x%llx ns=%d", payload, ns); ++ "PA 0x%llx ns=%d ch=%d pat=%x", ++ payload, ns, ch, pat); + break; + default: + /* Unknown index */ +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +index 7032fc141ad4..1ad14885c2a1 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +@@ -73,6 +73,8 @@ struct arm_spe_pkt { + + #define SPE_ADDR_PKT_GET_NS(v) (((v) & BIT_ULL(63)) >> 63) + #define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >> 61) ++#define SPE_ADDR_PKT_GET_CH(v) (((v) & BIT_ULL(62)) >> 62) ++#define SPE_ADDR_PKT_GET_PAT(v) (((v) & GENMASK_ULL(59, 56)) >> 56) + + #define SPE_ADDR_PKT_EL0 0 + #define SPE_ADDR_PKT_EL1 1 +-- +2.27.0 + diff --git a/patches/0040-perf-arm-spe-Add-support-for-ARMv8.3-SPE.patch b/patches/0040-perf-arm-spe-Add-support-for-ARMv8.3-SPE.patch new file mode 100644 index 0000000..dc940d7 --- /dev/null +++ b/patches/0040-perf-arm-spe-Add-support-for-ARMv8.3-SPE.patch @@ -0,0 +1,146 @@ +From afde7e19070a48deaac649e0f16f19b164870af1 Mon Sep 17 00:00:00 2001 +From: Wei Li +Date: Fri, 31 Dec 2021 13:32:17 +0800 +Subject: [PATCH 20/21] perf arm-spe: Add support for ARMv8.3-SPE + +mainline inclusion +from mainline-v5.11-rc1 +commit 05e91e7fe26c6fb116fa16f43c1eed78020f9463 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +------------------------------------------------- + +This patch is to support Armv8.3 extension for SPE, it adds alignment +field in the Events packet and it supports the Scalable Vector Extension +(SVE) for Operation packet and Events packet with two additions: + + - The vector length for SVE operations in the Operation Type packet; + - The incomplete predicate and empty predicate fields in the Events + packet. + +Signed-off-by: Wei Li +Signed-off-by: Leo Yan +Reviewed-by: Andre Przywara +Acked-by: Will Deacon +Cc: Alexander Shishkin +Cc: Al Grant +Cc: Arnaldo Carvalho de Melo +Cc: Dave Martin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: John Garry +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Namhyung Kim +Cc: Peter Zijlstra +Link: https://lore.kernel.org/r/20201119152441.6972-17-leo.yan@linaro.org +Signed-off-by: Arnaldo Carvalho de Melo +Reviewed-by: Yang Jihong +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + .../arm-spe-decoder/arm-spe-pkt-decoder.c | 36 +++++++++++++++++-- + .../arm-spe-decoder/arm-spe-pkt-decoder.h | 16 +++++++++ + 2 files changed, 50 insertions(+), 2 deletions(-) + +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +index 57c01ce27915..f3ac9d40cebf 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +@@ -317,6 +317,12 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet, + arm_spe_pkt_out_string(&err, &buf, &buf_len, " LLC-REFILL"); + if (payload & BIT(EV_REMOTE_ACCESS)) + arm_spe_pkt_out_string(&err, &buf, &buf_len, " REMOTE-ACCESS"); ++ if (payload & BIT(EV_ALIGNMENT)) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " ALIGNMENT"); ++ if (payload & BIT(EV_PARTIAL_PREDICATE)) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " SVE-PARTIAL-PRED"); ++ if (payload & BIT(EV_EMPTY_PREDICATE)) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " SVE-EMPTY-PRED"); + + return err; + } +@@ -329,8 +335,23 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, + + switch (packet->index) { + case SPE_OP_PKT_HDR_CLASS_OTHER: +- arm_spe_pkt_out_string(&err, &buf, &buf_len, +- payload & SPE_OP_PKT_COND ? "COND-SELECT" : "INSN-OTHER"); ++ if (SPE_OP_PKT_IS_OTHER_SVE_OP(payload)) { ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, "SVE-OTHER"); ++ ++ /* SVE effective vector length */ ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " EVLEN %d", ++ SPE_OP_PKG_SVE_EVL(payload)); ++ ++ if (payload & SPE_OP_PKT_SVE_FP) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " FP"); ++ if (payload & SPE_OP_PKT_SVE_PRED) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " PRED"); ++ } else { ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, "OTHER"); ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " %s", ++ payload & SPE_OP_PKT_COND ? ++ "COND-SELECT" : "INSN-OTHER"); ++ } + break; + case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC: + arm_spe_pkt_out_string(&err, &buf, &buf_len, +@@ -361,6 +382,17 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, + default: + break; + } ++ ++ if (SPE_OP_PKT_IS_LDST_SVE(payload)) { ++ /* SVE effective vector length */ ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " EVLEN %d", ++ SPE_OP_PKG_SVE_EVL(payload)); ++ ++ if (payload & SPE_OP_PKT_SVE_PRED) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " PRED"); ++ if (payload & SPE_OP_PKT_SVE_SG) ++ arm_spe_pkt_out_string(&err, &buf, &buf_len, " SG"); ++ } + break; + case SPE_OP_PKT_HDR_CLASS_BR_ERET: + arm_spe_pkt_out_string(&err, &buf, &buf_len, "B"); +diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +index 1ad14885c2a1..9b970e7bf1e2 100644 +--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h ++++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +@@ -113,6 +113,8 @@ enum arm_spe_events { + #define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC 0x1 + #define SPE_OP_PKT_HDR_CLASS_BR_ERET 0x2 + ++#define SPE_OP_PKT_IS_OTHER_SVE_OP(v) (((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x8) ++ + #define SPE_OP_PKT_COND BIT(0) + + #define SPE_OP_PKT_LDST_SUBCLASS_GET(v) ((v) & GENMASK_ULL(7, 1)) +@@ -128,6 +130,20 @@ enum arm_spe_events { + #define SPE_OP_PKT_AT BIT(2) + #define SPE_OP_PKT_ST BIT(0) + ++#define SPE_OP_PKT_IS_LDST_SVE(v) (((v) & (BIT(3) | BIT(1))) == 0x8) ++ ++#define SPE_OP_PKT_SVE_SG BIT(7) ++/* ++ * SVE effective vector length (EVL) is stored in byte 0 bits [6:4]; ++ * the length is rounded up to a power of two and use 32 as one step, ++ * so EVL calculation is: ++ * ++ * 32 * (2 ^ bits [6:4]) = 32 << (bits [6:4]) ++ */ ++#define SPE_OP_PKG_SVE_EVL(v) (32 << (((v) & GENMASK_ULL(6, 4)) >> 4)) ++#define SPE_OP_PKT_SVE_PRED BIT(2) ++#define SPE_OP_PKT_SVE_FP BIT(1) ++ + #define SPE_OP_PKT_IS_INDIRECT_BRANCH(v) (((v) & GENMASK_ULL(7, 1)) == 0x2) + + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); +-- +2.27.0 + diff --git a/patches/0041-drivers-perf-Add-support-for-ARMv8.3-SPE.patch b/patches/0041-drivers-perf-Add-support-for-ARMv8.3-SPE.patch new file mode 100644 index 0000000..6d7a692 --- /dev/null +++ b/patches/0041-drivers-perf-Add-support-for-ARMv8.3-SPE.patch @@ -0,0 +1,120 @@ +From d1286fe7f4e98918dd074a4e0a4d593fb6378d42 Mon Sep 17 00:00:00 2001 +From: Wei Li +Date: Fri, 30 Jul 2021 15:44:00 +0800 +Subject: [PATCH 21/21] drivers/perf: Add support for ARMv8.3-SPE + +mainline inclusion +from mainline-v5.11-rc4 +commit 4a669e2432fce9c01522a8453460e89f877dccd4 +category: feature +bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV +CVE: NA + +Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4a669e2432fce9c01522a8453460e89f877dccd4 + +------------------------------------------------------------------------ + +Armv8.3 extends the SPE by adding: +- Alignment field in the Events packet, and filtering on this event + using PMSEVFR_EL1. +- Support for the Scalable Vector Extension (SVE). + +The main additions for SVE are: +- Recording the vector length for SVE operations in the Operation Type + packet. It is not possible to filter on vector length. +- Incomplete predicate and empty predicate fields in the Events packet, + and filtering on these events using PMSEVFR_EL1. + +Update the check of pmsevfr for empty/partial predicated SVE and +alignment event in SPE driver. + +Signed-off-by: Wei Li +Link: https://lore.kernel.org/r/20201203141609.14148-1-liwei391@huawei.com +Signed-off-by: Will Deacon +Reviewed-by: Shaokun Zhang +Signed-off-by: Zheng Zengkai +Signed-off-by: hongrongxuan +--- + arch/arm64/include/asm/sysreg.h | 9 ++++++++- + drivers/perf/arm_spe_pmu.c | 17 +++++++++++++++-- + 2 files changed, 23 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h +index 0fd51d253648..f993af239247 100644 +--- a/arch/arm64/include/asm/sysreg.h ++++ b/arch/arm64/include/asm/sysreg.h +@@ -252,7 +252,11 @@ + #define SYS_PMSFCR_EL1_ST_SHIFT 18 + + #define SYS_PMSEVFR_EL1 sys_reg(3, 0, 9, 9, 5) +-#define SYS_PMSEVFR_EL1_RES0 0x0000ffff00ff0f55UL ++#define SYS_PMSEVFR_EL1_RES0_8_2 \ ++ (GENMASK_ULL(47, 32) | GENMASK_ULL(23, 16) | GENMASK_ULL(11, 8) |\ ++ BIT_ULL(6) | BIT_ULL(4) | BIT_ULL(2) | BIT_ULL(0)) ++#define SYS_PMSEVFR_EL1_RES0_8_3 \ ++ (SYS_PMSEVFR_EL1_RES0_8_2 & ~(BIT_ULL(18) | BIT_ULL(17) | BIT_ULL(11))) + + #define SYS_PMSLATFR_EL1 sys_reg(3, 0, 9, 9, 6) + #define SYS_PMSLATFR_EL1_MINLAT_SHIFT 0 +@@ -619,6 +623,9 @@ + #define ID_AA64DFR0_TRACEVER_SHIFT 4 + #define ID_AA64DFR0_DEBUGVER_SHIFT 0 + ++#define ID_AA64DFR0_PMSVER_8_2 0x1 ++#define ID_AA64DFR0_PMSVER_8_3 0x2 ++ + #define ID_ISAR5_RDM_SHIFT 24 + #define ID_ISAR5_CRC32_SHIFT 16 + #define ID_ISAR5_SHA2_SHIFT 12 +diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c +index af84f3a61e96..74318410774c 100644 +--- a/drivers/perf/arm_spe_pmu.c ++++ b/drivers/perf/arm_spe_pmu.c +@@ -65,7 +65,7 @@ struct arm_spe_pmu { + struct hlist_node hotplug_node; + + int irq; /* PPI */ +- ++ u16 pmsver; + u16 min_period; + u16 counter_sz; + +@@ -666,6 +666,18 @@ static irqreturn_t arm_spe_pmu_irq_handler(int irq, void *dev) + return IRQ_HANDLED; + } + ++static u64 arm_spe_pmsevfr_res0(u16 pmsver) ++{ ++ switch (pmsver) { ++ case ID_AA64DFR0_PMSVER_8_2: ++ return SYS_PMSEVFR_EL1_RES0_8_2; ++ case ID_AA64DFR0_PMSVER_8_3: ++ /* Return the highest version we support in default */ ++ default: ++ return SYS_PMSEVFR_EL1_RES0_8_3; ++ } ++} ++ + /* Perf callbacks */ + static int arm_spe_pmu_event_init(struct perf_event *event) + { +@@ -681,7 +693,7 @@ static int arm_spe_pmu_event_init(struct perf_event *event) + !cpumask_test_cpu(event->cpu, &spe_pmu->supported_cpus)) + return -ENOENT; + +- if (arm_spe_event_to_pmsevfr(event) & SYS_PMSEVFR_EL1_RES0) ++ if (arm_spe_event_to_pmsevfr(event) & arm_spe_pmsevfr_res0(spe_pmu->pmsver)) + return -EOPNOTSUPP; + + if (attr->exclude_idle) +@@ -948,6 +960,7 @@ static void __arm_spe_pmu_dev_probe(void *info) + fld, smp_processor_id()); + return; + } ++ spe_pmu->pmsver = (u16)fld; + + /* Read PMBIDR first to determine whether or not we have access */ + reg = read_sysreg_s(SYS_PMBIDR_EL1); +-- +2.27.0 + diff --git a/series.conf b/series.conf index 68dee7f..1470060 100644 --- a/series.conf +++ b/series.conf @@ -21,4 +21,25 @@ patches/0016-hwtracing-hisi_ptt-Fix-potential-sleep-in-atomic-con.patch patches/0017-hwtracing-hisi_ptt-Keep-to-advertise-PERF_PMU_CAP_EX.patch patches/0018-hwtracing-hisi_ptt-Add-dummy-callback-pmu-read.patch patches/0019-config-arm64-Enable-config-of-hisi-ptt.patch -patches/0020-crypto-hisilicon-fix-different-versions-of-devices-d.patch \ No newline at end of file +patches/0020-crypto-hisilicon-fix-different-versions-of-devices-d.patch +patches/0021-perf-arm-spe-Include-bitops.h-for-BIT-macro.patch +patches/0022-perf-arm-spe-Fix-a-typo-in-comment.patch +patches/0023-perf-arm-spe-Refactor-payload-size-calculation.patch +patches/0024-perf-arm-spe-Refactor-arm_spe_get_events.patch +patches/0025-perf-arm-spe-Fix-packet-length-handling.patch +patches/0026-perf-arm-spe-Refactor-printing-string-to-buffer.patch +patches/0027-perf-arm-spe-Refactor-packet-header-parsing.patch +patches/0028-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_addr.patch +patches/0029-perf-arm-spe-Refactor-address-packet-handling.patch +patches/0030-perf-arm-spe-Refactor-context-packet-handling.patch +patches/0031-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_count.patch +patches/0032-perf-arm-spe-Refactor-counter-packet-handling.patch +patches/0033-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_event.patch +patches/0034-perf-arm-spe-Refactor-event-type-handling.patch +patches/0035-perf-arm-spe-Remove-size-condition-checking-for-even.patch +patches/0036-perf-arm-spe-Add-new-function-arm_spe_pkt_desc_op_ty.patch +patches/0037-perf-arm-spe-Refactor-operation-packet-handling.patch +patches/0038-perf-arm-spe-Add-more-sub-classes-for-operation-pack.patch +patches/0039-perf-arm_spe-Decode-memory-tagging-properties.patch +patches/0040-perf-arm-spe-Add-support-for-ARMv8.3-SPE.patch +patches/0041-drivers-perf-Add-support-for-ARMv8.3-SPE.patch