!1335 KVM: arm64: limit PMU version to PMUv3 for ARMv8.1
From: @zhang-yuans Reviewed-by: @yuzenghui Signed-off-by: @Lostwayzxc
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@ -32,7 +32,7 @@
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Name: kernel
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Version: 4.19.90
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Release: %{hulkrelease}.0252
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Release: %{hulkrelease}.0253
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Summary: Linux Kernel
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License: GPLv2
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URL: http://www.kernel.org/
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@ -849,6 +849,9 @@ fi
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%endif
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%changelog
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* Tue Nov 28 2023 Yuan Zhang <zhangyuan162@huawei.com> - 4.19.90-2311.5.0.0253
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- arm64: cpufeature: Extract capped perfmon fields
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- KVM: arm64: limit PMU version to PMUv3 for ARMv8.1
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* Tue Nov 28 2023 Li Xiaodong <lixiaodong67@huawei.com> - 4.19.90-2311.5.0.0252
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- !3000 [openEuler-1.0-LTS] add Phytium drivers CONFIG
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@ -0,0 +1,80 @@
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From a207eaeac98757a86cce704be6c4e097439503c5 Mon Sep 17 00:00:00 2001
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From: Andrew Murray <andrew.murray@arm.com>
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Date: Tue, 28 Nov 2023 15:46:32 +0800
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Subject: [PATCH 1/2] arm64: cpufeature: Extract capped perfmon fields
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mainline inclusion
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from mainline-v5.7-rc1
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commit 8e35aa642ee4dab01b16cc4b2df59d1936f3b3c2
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category: bugfix
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bugzilla: https://gitee.com/openeuler/kernel/issues/I8K8XV
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CVE: NA
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Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=8e35aa642ee4dab01b16cc4b2df59d1936f3b3c2
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-----------------------------------
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commit 8e35aa642ee4dab01b16cc4b2df59d1936f3b3c2 upstream.
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When emulating ID registers there is often a need to cap the version
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bits of a feature such that the guest will not use features that the
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host is not aware of. For example, when KVM mediates access to the PMU
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by emulating register accesses.
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Let's add a helper that extracts a performance monitors ID field and
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caps the version to a given value.
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Fields that identify the version of the Performance Monitors Extension
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do not follow the standard ID scheme, and instead follow the scheme
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described in ARM DDI 0487E.a page D13-2825 "Alternative ID scheme used
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for the Performance Monitors Extension version". The value 0xF means an
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IMPLEMENTATION DEFINED PMU is present, and values 0x0-OxE can be treated
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the same as an unsigned field with 0x0 meaning no PMU is present.
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Signed-off-by: Andrew Murray <andrew.murray@arm.com>
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Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
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[Mark: rework to handle perfmon fields]
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Signed-off-by: Mark Rutland <mark.rutland@arm.com>
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Signed-off-by: Will Deacon <will@kernel.org>
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Signed-off-by: zhangyuan <zhangyuan162@huawei.com>
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---
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arch/arm64/include/asm/cpufeature.h | 23 +++++++++++++++++++++++
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1 file changed, 23 insertions(+)
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diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
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index eef5a9c9b823..e2ba573644d5 100644
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--- a/arch/arm64/include/asm/cpufeature.h
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+++ b/arch/arm64/include/asm/cpufeature.h
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@@ -449,6 +449,29 @@ cpuid_feature_extract_unsigned_field(u64 features, int field)
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return cpuid_feature_extract_unsigned_field_width(features, field, 4);
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}
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+/*
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+ * Fields that identify the version of the Performance Monitors Extension do
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+ * not follow the standard ID scheme. See ARM DDI 0487E.a page D13-2825,
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+ * "Alternative ID scheme used for the Performance Monitors Extension version".
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+ */
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+static inline u64 __attribute_const__
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+cpuid_feature_cap_perfmon_field(u64 features, int field, u64 cap)
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+{
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+ u64 val = cpuid_feature_extract_unsigned_field(features, field);
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+ u64 mask = GENMASK_ULL(field + 3, field);
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+
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+ /* Treat IMPLEMENTATION DEFINED functionality as unimplemented */
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+ if (val == 0xf)
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+ val = 0;
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+
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+ if (val > cap) {
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+ features &= ~mask;
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+ features |= (cap << field) & mask;
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+ }
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+
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+ return features;
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+}
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+
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static inline u64 arm64_ftr_mask(const struct arm64_ftr_bits *ftrp)
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{
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return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
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--
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2.33.0
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@ -0,0 +1,89 @@
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From 6a416c5efa3ce99f5f0f7e9c603b42b0e047481c Mon Sep 17 00:00:00 2001
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From: Andrew Murray <andrew.murray@arm.com>
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Date: Tue, 28 Nov 2023 15:46:33 +0800
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Subject: [PATCH 2/2] KVM: arm64: limit PMU version to PMUv3 for ARMv8.1
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mainline inclusion
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from mainline-v5.7-rc1
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commit c854188ea01062f5a5fd7f05658feb1863774eaa
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category: bugfix
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bugzilla: https://gitee.com/openeuler/kernel/issues/I8K8XV
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CVE: NA
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Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c854188ea01062f5a5fd7f05658feb1863774eaa
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-----------------------------------
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commit c854188ea01062f5a5fd7f05658feb1863774eaa upstream.
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We currently expose the PMU version of the host to the guest via
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emulation of the DFR0_EL1 and AA64DFR0_EL1 debug feature registers.
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However many of the features offered beyond PMUv3 for 8.1 are not
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supported in KVM. Examples of this include support for the PMMIR
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registers (added in PMUv3 for ARMv8.4) and 64-bit event counters
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added in (PMUv3 for ARMv8.5).
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Let's trap the Debug Feature Registers in order to limit
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PMUVer/PerfMon in the Debug Feature Registers to PMUv3 for ARMv8.1
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to avoid unexpected behaviour.
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Both ID_AA64DFR0.PMUVer and ID_DFR0.PerfMon follow the "Alternative ID
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scheme used for the Performance Monitors Extension version" where 0xF
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means an IMPLEMENTATION DEFINED PMU is implemented, and values 0x0-0xE
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are treated as with an unsigned field (with 0x0 meaning no PMU is
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present). As we don't expect to expose an IMPLEMENTATION DEFINED PMU,
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and our cap is below 0xF, we can treat these fields as unsigned when
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applying the cap.
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Signed-off-by: Andrew Murray <andrew.murray@arm.com>
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Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
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[Mark: make field names consistent, use perfmon cap]
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Signed-off-by: Mark Rutland <mark.rutland@arm.com>
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Signed-off-by: Will Deacon <will@kernel.org>
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Signed-off-by: zhangyuan <zhangyuan162@huawei.com>
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---
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arch/arm64/include/asm/sysreg.h | 6 ++++++
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arch/arm64/kvm/sys_regs.c | 10 ++++++++++
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2 files changed, 16 insertions(+)
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diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
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index de4c31f073bb..041100c28cab 100644
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--- a/arch/arm64/include/asm/sysreg.h
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+++ b/arch/arm64/include/asm/sysreg.h
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@@ -637,6 +637,12 @@
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#define ID_AA64DFR0_TRACEVER_SHIFT 4
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#define ID_AA64DFR0_DEBUGVER_SHIFT 0
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+#define ID_AA64DFR0_PMUVER_8_1 0x4
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+
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+#define ID_DFR0_PERFMON_SHIFT 24
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+
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+#define ID_DFR0_PERFMON_8_1 0x4
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+
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#define ID_AA64DFR0_PMSVER_8_2 0x1
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#define ID_AA64DFR0_PMSVER_8_3 0x2
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diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
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index 25caa9ec95e4..cc824a208684 100644
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--- a/arch/arm64/kvm/sys_regs.c
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+++ b/arch/arm64/kvm/sys_regs.c
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@@ -1082,6 +1082,16 @@ static u64 read_id_reg(struct kvm_vcpu *vcpu,
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kvm_debug("LORegions unsupported for guests, suppressing\n");
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val &= ~(0xfUL << ID_AA64MMFR1_LOR_SHIFT);
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+ } else if (id == SYS_ID_AA64DFR0_EL1) {
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+ /* Limit guests to PMUv3 for ARMv8.1 */
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+ val = cpuid_feature_cap_perfmon_field(val,
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+ ID_AA64DFR0_PMUVER_SHIFT,
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+ ID_AA64DFR0_PMUVER_8_1);
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+ } else if (id == SYS_ID_DFR0_EL1) {
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+ /* Limit guests to PMUv3 for ARMv8.1 */
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+ val = cpuid_feature_cap_perfmon_field(val,
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+ ID_DFR0_PERFMON_SHIFT,
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+ ID_DFR0_PERFMON_8_1);
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}
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return val;
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--
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2.33.0
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@ -758,3 +758,5 @@ patches/0754-scsi-hisi_sas_v3_hw-Remove-extra-function-calls-for-.patch
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patches/0755-config-arm64-Enable-dubugfs-config-of-hisi-sas.patch
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patches/0756-crypto-hisilicon-Add-value-profile-support-for-kerne.patch
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patches/0757-Revert-genirq-Increase-the-number-of-IRQ-descriptors.patch
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patches/0758-arm64-cpufeature-Extract-capped-perfmon-fields.patch
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patches/0759-KVM-arm64-limit-PMU-version-to-PMUv3-for-ARMv8.1.patch
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