From 2ee9d506673f6abaee074312d2ae189fd941e58c Mon Sep 17 00:00:00 2001
From: Junhao He <hejunhao3@huawei.com>
Date: Wed, 4 Jan 2023 19:55:09 +0800
Subject: [PATCH 44/55] perf: hisi: Fix read sccl_id and ccl_id error in TSV200

driver inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I68F5A
CVE: NA

--------------------------------

In TSV200 platform, SCCL is Aff3[7:0], CCL is Aff2[7:0] if mt.
Fixes: 1af26389a3 ("perf: hisi: Fix read sccl_id and ccl_id error in some platform")

Signed-off-by: Junhao He <hejunhao3@huawei.com>
Reviewed-by: Yang Shen <shenyang39@huawei.com>
Reviewed-by: Yang Jihong <yangjihong1@huawei.com>
Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com>
Signed-off-by: hongrongxuan <hongrongxuan@huawei.com>
---
 drivers/perf/hisilicon/hisi_uncore_pmu.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisilicon/hisi_uncore_pmu.c
index 9aaaf9cf2b2a..91d2da895924 100644
--- a/drivers/perf/hisilicon/hisi_uncore_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c
@@ -440,7 +440,6 @@ static void hisi_read_sccl_and_ccl_id(int *scclp, int *cclp)
 	if (mt) {
 		switch (read_cpuid_part_number()) {
 		case HISI_CPU_PART_TSV110:
-		case HISI_CPU_PART_TSV200:
 		case ARM_CPU_PART_CORTEX_A55:
 			sccl = aff2 >> 3;
 			ccl = aff2 & 0x7;
-- 
2.27.0

